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应用于射频LNA的开关电容DC-DC转换器的研究

发布时间:2019-04-03 11:59
【摘要】:随着现代集成电路技术的高速发展,基于电池供电的便携式电子产品得到广泛应用,譬如iPhone、iPad、数码相机、智能手表等消费类电子产品。便携式电子产品不仅在性能和功能上朝着多元化智能化发展,体积和尺寸上也越来越“小、轻、薄”。所以基于这些改变,对电源管理芯片提出了更严格的要求,往往要求DC-DC转换器具有高效率、小体积、低成本等特点。DC-DC转换器分为三类:低压差线性稳压器(LDO)、电感型开关电源和电容型开关电源。传统射频端供电常采用线性稳压器,因为其具有稳定性好、低噪声、使用可靠等优点。所以广泛被应用于射频、音频、ADC转换等应用,但是其效率比较低。电感型开关电源由于采用电感线圈作为储能元件,体积较大不易于片上集成且EMI较大。由于这些限制它们将难以顺应现代电子技术的发展潮流。电容型开关电源仅含有开关与电容元件,通过控制电容的充放电来实现能量的转换,电路结构简单,EMI较小,效率较高。同时由于电路中不存在电感元件,集成度比较高,使低成本高效率的开关电源给对噪声敏感的射频端供电成为可能。所以本论文对开关电容型DC-DC转换器展开深入研究和讨论,提出了一种应用于给射频低噪放供电的高效率低纹波的开关电容转换器。本论文针对开关电容转换器输出电压纹波较大的原因做了详细的分析和研究,提出了梯形波驱动的纹波抑制技术和基于飞跨电容多步充放电的电荷泵多相交织技术,同时采用自适应时钟频率调制,有效抑制了输出电压纹波。通过自适应时钟频率调制,使得系统开关频率随着负载的情况线性变化,降低输出电压纹波的同时也提高了轻载效率。基于CSMC 0.5um CMOS工艺模型,首先用verilogA进行系统模型的构建,设计性能指标,接着对各个模块电路进行晶体管级设计,主要包括带隙基准源、VCO、数字状态机、开关电容阵列、ADC以及驱动电路等。完成电路设计后对系统进行spectreverilog仿真,结果显示当输入电压为5V~2.5V范围内,最大负载电流60mA,最大输出电压纹波小于2mV,达到了预期设计要求。
[Abstract]:With the rapid development of modern integrated circuit technology, battery-powered portable electronic products, such as iPhone,iPad, digital camera, smartwatch and other consumer electronic products, have been widely used. Portable electronic products are not only developing towards diversified intelligence in performance and function, but also smaller, lighter and thinner in size and volume. Therefore, based on these changes, we put forward stricter requirements for power management chips, which often require that DC-DC converters have the characteristics of high efficiency, small volume and low cost. DC-DC converters can be divided into three categories: low-voltage differential linear voltage regulator (LDO),). Inductive switching power supply and capacitive switching power supply. Traditional RF terminal power supply usually uses linear voltage regulator, because it has the advantages of good stability, low noise, reliable use and so on. So it is widely used in radio frequency, audio, ADC conversion and other applications, but its efficiency is relatively low. Because inductor coil is used as energy storage element in inductive switching power supply, it is difficult to integrate on chip and EMI is larger. Because of these limitations, they will be difficult to adapt to the trend of the development of modern electronic technology. Capacitive switching power supply only contains switch and capacitor components. Energy conversion can be realized by controlling the charge and discharge of capacitance. The circuit structure is simple, EMI is small and efficiency is high. At the same time, because there is no inductor in the circuit and the integration is high, it is possible that the switching power supply with low cost and high efficiency can supply the RF terminal which is sensitive to noise. In this paper, the switched capacitive DC-DC converter is studied and discussed in depth, and a high efficiency and low ripple switching capacitor converter is proposed, which is used to supply the RF low noise amplifier with high efficiency and low ripple. In this paper, the reasons why the output voltage ripple of switched capacitor converter is large are analyzed and studied in detail, and the ripple suppression technology driven by trapezoidal wave and the charge pump multi-phase interleaving technology based on multi-step charge and discharge of flying capacitor are proposed. At the same time, adaptive clock-frequency modulation is used to suppress the output voltage ripple effectively. By adaptive clock-frequency modulation, the switching frequency of the system varies linearly with the load, reduces the output voltage ripple, and improves the efficiency of light load. Based on the CSMC 0.5um CMOS process model, the system model is constructed with verilogA, and the performance index is designed. Then the transistor level design of each module circuit is carried out, including band gap reference, VCO, digital state machine, switched capacitor array, and so on. ADC and driving circuit. When the input voltage is in the range of 5V~2.5V, the maximum load current is 60mA and the maximum output voltage ripple is less than 2mV. The simulation results show that the spectreverilog simulation results show that the system achieves the expected design requirements when the input voltage is within the range of 5V~2.5V and the maximum output voltage ripple is less than 2mV.
【学位授予单位】:南京航空航天大学
【学位级别】:硕士
【学位授予年份】:2014
【分类号】:TM46

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