高精度数字时间转换技术的研究与实现

发布时间：2018-01-09 22:10

  本文关键词：高精度数字时间转换技术的研究与实现　出处：《西安电子科技大学》2015年硕士论文　论文类型：学位论文

  更多相关文章： FPGA 数字时间转换器 时间间隔 可编程绝对延迟单元

【摘要】：随着电子技术的发展与进步,时间间隔的控制精度越来越高,已经深入到皮秒甚至亚皮秒量级。数字时间转换器(Digital-to-Time Converters,DTC)属于一种时间间隔产生技术,它不仅广泛应用于高能物理实验、天文测量等基础研究领域,并且在航空航天、遥感定位、雷达、电子测量等应用研究领域也是一项必不可少的重要技术。目前,高分辨率的DTC系统主要是利用AISC芯片实现,但其具有灵活性低、开发周期长等缺点。基于FPGA实现DTC系统不仅具有高灵活性和高稳定性,还可以缩短开发周期。但是,利用FPGA芯片实现的DTC系统分辨率不够高,难以达到与ASIC相同的精度。因此,论文利用FPGA芯片实现高精度DTC系统具有重要的研究意义。论文首先对几种传统数字时间转换器进行研究,深入分析了不同DTC方法的优缺点,并进行了对比研究。而后为了在FPGA芯片上实现高精度的数字时间转换器,论文对直接计数法DTC和差分延迟法DTC进行了改进,提出一种新的时间间隔产生实现方法,并在Xilinx Virtex-6系列FPGA芯片上,实现了具有高分辨率、宽动态范围和高稳定性的数字时间转换器。DTC系统选择Xilinx Virtex-6系列FPGA内部集成的可编程绝对延迟单元作为差分延迟链的延迟单元,它不仅可以实现高精度的延迟,还使得DTC系统精度不受温度和供电电压的影响,极大增强了DTC系统的稳定性。DTC系统研究实现时采用模块化设计,包括粗时间间隔产生模块、细时间间隔产生模块、数据处理模块、软件控制模块和输出控制模块等,并分别对各个模块进行详细研究设计。此外,论文还特别针对关键延迟时间进行分析,通过手动调整布局布线,消除了因布线延迟对DTC系统精度的影响,以保证DTC系统分辨率达到设计要求。为了验证研究实现的DTC系统性能,论文搭建专门的测试平台,对DTC系统进行了仿真和实验测试。测试结果表明,该DTC系统的理论分辨率为1ps,微分非线性误差为-0.17~0.13LSB,积分非线性误差为-0.35~0.62LSB,其线性度达到理论要求。另外,论文还对系统的稳定性进行测试,验证了系统分辨率在10~60℃温度范围内保持不变。因此,论文实现的DTC系统具有1ps的理论分辨率,并具备良好的线性度和稳定度,有很好的实用价值。
[Abstract]:With the development and progress of electronic technology, the control precision of time interval is getting higher and higher. Digital time converter Digital-to-Time converters DTCs are part of a time-interval generation technology. It is not only widely used in high energy physics experiments, astronomical measurement and other basic research areas, but also in aerospace, remote sensing positioning, radar. At present, high resolution DTC system is mainly realized by AISC chip, but its flexibility is low. The DTC system based on FPGA not only has high flexibility and stability, but also can shorten the development cycle. The resolution of DTC system realized by FPGA chip is not high enough, so it is difficult to achieve the same precision as ASIC. In this paper, it is of great significance to use FPGA chip to realize high precision DTC system. Firstly, several traditional digital time converters are studied, and the advantages and disadvantages of different DTC methods are analyzed. In order to realize the high precision digital time converter on FPGA chip, the direct counting method DTC and differential delay method DTC are improved in this paper. A new method of time interval generation is proposed, and high resolution is realized on Xilinx Virtex-6 series FPGA chips. Wide dynamic range and high stability digital time converter. DTC system select Xilinx. The programmable absolute delay unit integrated within the Virtex-6 series FPGA is used as the delay unit of the differential delay chain. It can not only achieve high precision delay, but also make the accuracy of DTC system independent of temperature and power supply voltage, greatly enhance the stability of DTC system. It includes coarse time interval generation module, fine time interval generation module, data processing module, software control module and output control module. In this paper, the key delay time is analyzed, and the influence of routing delay on the precision of DTC system is eliminated by manually adjusting the layout and routing. In order to ensure the resolution of DTC system to meet the design requirements. In order to verify the performance of the DTC system, this paper built a special test platform. The DTC system is simulated and tested. The experimental results show that the theoretical resolution of the DTC system is 1 psand the differential nonlinear error is -0.17 / 0.13 LSB. The integral nonlinear error is -0.35 ~ 0.62 LSBs, and the linearity reaches the theoretical requirements. In addition, the stability of the system is tested. It is verified that the resolution of the system remains constant in the temperature range of 10 ~ 60 鈩，

本文编号：1402713