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多通道音频段正弦信号发生技术的研究

发布时间:2018-01-14 20:01

  本文关键词:多通道音频段正弦信号发生技术的研究 出处:《哈尔滨理工大学》2017年硕士论文 论文类型:学位论文


  更多相关文章: 音频段信号 多通道 SPWM变换 开关乘法


【摘要】:在科学研究和工程实践的测试系统中,往往需要多路信号作为激励源,比如机械系统,水声探测系统等。传统的获得多通道信号的方法是使用多个信号发生器/任意波发生器,使用大量相同的模拟电路和数字电路的叠加。这种方法的体积大,硬件成本高,功耗大。另一方面,由于每个信号源都使用独立的时钟晶振,即使时钟晶振的绝对误差和温漂系数极小,由于时间的累积,各通道输出的激励经过长时间的工作之后,通道间的信号不匹配,程度加大。因此,多路激励系统需要解决两大关键技术,一是电路的小尺寸和低功耗,二是通道信号间的同步问题。现在数字技术发展迅猛,特别是大容量、高速度的CPLD/FPGA的广泛使用。本文充分利用CPLD/FPGA的数字资源,对多通道的音频段正弦信号的发生方法进行研究,并对电路进行设计和仿真。首先研究了有存储资源的基于FPGA的多通道音频段正弦信号发生方法,FPGA内嵌RAM资源,可以将正弦波形表固化在FPGA中,利用SPWM波形变换原理,研究扩展通道的数量与FPGA资源的关系,并进行模拟电路设计。对8通道的SPWM逻辑信号进行仿真设计,并以三通道为例在音频的范围内实现正弦信号的发生。SPWM逻辑信号的仿真设计以及正弦信号的发生表明,该方法可以在音频范围内实现其多通道的信号发生,其频率可达到10kHz。线路简单,只需要一根信号输入线即可,充分利用了数字资源,占用FPGA内部的RAM资源,并且其通道数取决去FPGA内的RAM资源。此外,各个通道间的信号还可以实现隔离。接着研究了无存储资源的多通道音频段正弦信号的发生方法,利用开关乘法正弦发生原理来实现,分别基于CPLD对8通道和基于FPGA对56通道的控制电路进行仿真设计,然后,同样以三通道为例,在音频的范围内,对开关乘法正弦变换电路进行设计。该方法不在需要占用RAM资源,从而易于更好的扩展通道的个数,其线路数为2N+1,其中N为通道数。
[Abstract]:In the test system of scientific research and engineering practice, often require multiple signals as the excitation source, such as mechanical system, underwater acoustic detection system. The traditional method to obtain multi-channel signal is to use multiple signal generator / arbitrary wave generator, used together with large numbers of identical analog circuits and digital circuits. This method of large volume hardware, high cost, high power consumption. On the other hand, because each source is independent of the clock, the clock even if the absolute error and the temperature drift coefficient is extremely small, due to the accumulation of time, the output of each channel excitation after long time working, the signal channel does not match the degree of increase. Therefore, multiple incentive system needs to solve two key technologies, is a small size and low power consumption circuit, two channel signal synchronization between. Now the rapid development of digital technology, especially large capacity, high The widespread use of the speed of CPLD/FPGA. This paper makes full use of digital resources of CPLD/FPGA, research method of multi channel audio Duan Zhengxian signal, and the design and Simulation of the circuit. Firstly, storage resources for the FPGA multi channel audio frequency sinusoidal signal generating method based on FPGA, embedded RAM resources can be sine wave shape curing in FPGA, using SPWM waveform transform principle, the relationship between resource quantity and FPGA study on the expansion of channels, and analog circuit design. The simulation design of SPWM logic signals of 8 channels, and three channels to realize in the audio range of sinusoidal signal.SPWM signal simulation and logic design sine wave signal generating signals show that this method can realize the multi channel in the audio range, the frequency can reach 10kHz. simple circuit, only one signal input line To make full use of the digital resources, occupy the FPGA RAM internal resources, and the number of channels depends on to FPGA within the RAM resources. In addition, each channel between the signal can also achieve isolation. Then study the method without storage resources of multi channel audio frequency sinusoidal signal, using the switching principle to realize sine multiplication based on the CPLD of 8 channels respectively, and the control circuit of the 56 channel FPGA based on simulation design, then, the same three channel as an example, in the audio range, the design of the switching circuit multiplication sine transform. This method does not occupy RAM resources in need, the number of which is easy to extend channel better, the the line number is 2N+1, where N is the number of channels.

【学位授予单位】:哈尔滨理工大学
【学位级别】:硕士
【学位授予年份】:2017
【分类号】:TN702

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