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全旋涂工艺构建核心体系制备浮栅有机晶体管存储器的研究

发布时间:2018-01-16 22:03

  本文关键词:全旋涂工艺构建核心体系制备浮栅有机晶体管存储器的研究 出处:《吉林大学》2017年博士论文 论文类型:学位论文


  更多相关文章: 浮栅 有机薄膜晶体管 非易失性存储器 核心体系 全溶液旋涂工艺


【摘要】:与当前已产业化的无机半导体存储器相比,基于有机半导体材料的有机存储器因具有工艺简单、可低温加工、成本低、柔性应用等先天性的优点,成为当前国际上的研究热点之一。在多种有机存储器中,基于浮栅结构的有机薄膜晶体管非易失性存储器(FG-OTFT-NVM)具有非破坏性可读、非易失性存储、存储单元的单一晶体管结构、与集成电路具有更好的兼容性等优点,因此受到研究人员更多的关注。除了三个终端电极之外,标准的FG-OTFT-NVM器件的核心体系是由有机半导体层(也称为有源层)、隧穿层、浮栅层和阻挡层这四层薄膜依次堆栈而成。迄今为止,FG-OTFT-NVM的研制普遍地存在以下两个特点:(1)采用顶栅结构制备FG-OTFT-NVM的报道很少,相比于底栅结构,顶栅结构的FG-OTFT-NVM因上层的绝缘层和栅电极对有机半导体层的自封装作用,能显著提升存储器的贮存和使用寿命;(2)在绝大数已报道的FG-OTFT-NVM器件中,其核心体系中至少有一层或二层的功能性薄膜采用了高真空、高成本、高能耗的传统半导体工艺方法制备,不仅在很大程度上抵消了FG-OTFT-NVM自身拥有的制备工艺简单、可低温加工、成本低、柔性应用等方面优势,还因为不同制备工艺技术的切换,中断了器件制备的连续性。在本论文研究中,我们立足于FG-OTFT-NVM自身的先天性优势,提出并开展了采用全溶液旋涂工艺制备由多层薄膜堆栈构建的核心体系的顶栅结构的FG-OTFT-NVM的研究工作。首先,我们开展了相关的实验工作,论证了全溶液旋涂方式制备FG-OTFT-NVM的核心体系的工艺兼容性。选用p型的聚合物半导体P3HT作为存储器的有源层,以聚合物PS混合小分子半导体TIPS-Pen分别作为浮栅层,选用聚合物PMMA作为隧穿层和阻挡层,制备了顶栅结构的FG-OTFT-NVM,提取了存储器的各项性能参数,并分析了器件的存储工作机制。针对于采用p型聚合物半导体制备的FG-OTFT-NVM器件所呈现的问题:即,单一的空穴在写入/擦除电压操作下,被存储于浮栅或从浮栅层被排除,而导致的存储器的读取电压不能设定为0 V,相应的存储性能参数相对较差。我们提出并制备了基于双极性聚合物半导体P(NDI2OD-T2)有源层的FG-OTFT-NVM。采用全溶液旋涂工艺制备了存储器的核心体系,优化了浮栅层中聚合物PS和小分子半导体TIPS-Pen两者的比例关系。实现了双极性电荷(电子和空穴)分别在写入和擦除电压下,以过饱和覆写的方式,被注入并存储在浮栅层,增大了存储器的存储窗口,并实现了理想的读取电压VR=0V,延长了电荷存储保持时间。制备的存储器的整体性能参数与当前阶段国际上已报道的处于领先水平的同类器件相当。进一步的,我们从PS与TIPS-Pen的混合氯苯溶液,通过一次旋涂工艺制备了一体化的隧穿层/浮栅层薄膜,简化了FG-OTFT-NVM的器件结构和工艺制备流程,进一步突出了在工艺制备和成本方面的优势。研究了一体化的隧穿层/浮栅层中PS与TIPS-Pen的比例成分对器件存储性能参数的影响,并得到优化的结果。基于优化的一体化的隧穿层/浮栅层结构的FG-OTFT-NVM,获得了良好的存储器性能。最后,我们分别在PES和PI柔性衬底上,采用全溶液旋涂工艺构建存储器的核心体系,制备了FG-OTFT-NVM,两组柔性存储器均现了明显的非易失性存储效果。我们的研究表明,与当前已经产业化的Si基半导体的同类器件相比,能够采用全溶液法旋涂工艺构建器件的核心体系,实现FG-OTFT-NVM的制备,在可低温和大面积制备、能耗与成本等方面呈现了巨大的优势,也揭示了FG-OTFT-NVM在柔性、可穿戴的电子器件等领域有广阔的应用前景。
[Abstract]:Compared with the inorganic semiconductor memory has the industrialization of the organic semiconductor material for organic memory has the advantages of simple process based on low temperature processing, low cost, flexible application of congenital, become one of the hot spots in the world. In a variety of organic storage, organic thin film transistor, floating gate structure is not easy to be based on the volatile memory (FG-OTFT-NVM) with non destructive read, nonvolatile memory, single transistor memory cell structure, integrated circuit and has better compatibility and other advantages, so researchers have paid more attention to. In addition to the three terminal electrode, the core system of FG-OTFT-NVM standard device is composed of an organic semiconductor layer (also known as active layer), tunneling layer, floating gate layer and the barrier layer of the four layer stacking together. So far, the development of FG-OTFT-NVM generally exist in the following two characteristics: ( 1) prepared by FG-OTFT-NVM top gate structure system is rarely reported, compared to the bottom gate structure, top gate structure of the FG-OTFT-NVM because of the upper insulating layer and a gate electrode of the organic semiconductor layer from the package, can significantly improve the life of storage and use of memory; (2) FG-OTFT-NVM devices in most of the reported the core of system, at least one functional film layer or the two layer with high vacuum, high cost, high energy consumption of the conventional semiconductor process preparation, not only largely offset the FG-OTFT-NVM with its simple preparation process, low temperature processing, low cost, flexible application and other advantages, but also because the switch between different preparation technology, interrupts the continuity of device fabrication. In this study, we based on the FG-OTFT-NVM's own congenital advantage, put forward and carried out by solution spin coating by multilayer The research work of the top gate structure construction of the core system of thin film stack FG-OTFT-NVM. First, we carried out experiments, demonstrates the whole process compatibility solution spin coating method for the preparation of FG-OTFT-NVM core system. Use the P type polymer semiconductor P3HT as active layer of memory, with mixed polymer PS small molecule semiconductor TIPS-Pen were used as the floating gate layer with polymer PMMA as tunneling layer and the barrier layer, the preparation of top gate structure of the FG-OTFT-NVM, extract the performance parameters of the memory, and analyzes the working mechanism of storage devices. In view of the present on the FG-OTFT-NVM device of P type semiconductor polymer preparation problem: namely, a single hole in the write / erase voltage operation, is stored in the floating gate or from the floating gate layer is removed, and the read voltage cannot cause memory is set to 0 V, the corresponding storage performance The parameter is relatively poor. We proposed and fabricated bipolar polymer semiconductor P (NDI2OD-T2) based on the FG-OTFT-NVM. of the active layer by solution spin coating process for core system memory by optimization of the floating gate layer of PS polymer and small molecule semiconductor TIPS-Pen proportion relationship. Realized the bipolar charge (electron and hole) in writing and erasing voltage, in supersaturated overwrite mode, is injected and stored in the floating gate layer, the storage memory window, and achieve the ideal read voltage VR=0V, prolong the retention time. The charge storage performance parameter memory prepared equivalent current international similar devices have been reported in the leading level. Further, we from a mixture of Chlorobenzene in aqueous solution by PS and TIPS-Pen, by a spin coating preparation process of the integration of the tunneling layer / floating gate layer, simplified The FG-OTFT-NVM device structure and fabrication process, and further highlights in the preparation process and cost advantages. On the integration of PS and TIPS-Pen tunneling layer / floating gate layer in the proportion of components on the device storage performance parameters, and get the optimal results. The optimized integration based on cross layer / tunnel the floating gate layer structure of the FG-OTFT-NVM, the memory of good performance. Finally, we respectively in PES and PI on a flexible substrate, the core system memory by solution spin coating process, FG-OTFT-NVM prepared, two groups of flexible memory are now a nonvolatile memory effect. Our study shows that compared to similar devices with Si based semiconductor currently has industrialization, the core system can construct the spin coating device using whole solution method, the preparation of FG-OTFT-NVM, at low temperature and large area preparation, energy consumption and These aspects have shown great advantages, and also reveal the broad application prospects of FG-OTFT-NVM in the fields of flexible and wearable electronic devices.

【学位授予单位】:吉林大学
【学位级别】:博士
【学位授予年份】:2017
【分类号】:TN321.5;TP333

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