一种FPGA芯片时钟SKEW的测试方法

发布时间：2018-02-24 22:28

  本文关键词： FPGA SKEW 环形振荡器 测试　出处：《微电子学与计算机》2017年06期 　论文类型：期刊论文

【摘要】：随着FPGA规模的扩大和工作频率的提高,时钟Skew成为FPGA越来越重要的性能指标,而如何精确测试芯片中的时钟Skew也就显得尤为重要.对此以JFPGA-YX2芯片为例,介绍一种可以精确测量FPGA时钟Skew的测试方法.将芯片内部的时钟资源通过配置逻辑配置成一系列的环形振荡器,每个振荡器的振荡频率由该振荡器所包含路径的延时决定.对这些振荡器的测量频率值进行运算处理即可获得精确的时钟Skew.
[Abstract]:With the expansion of FPGA and the increase of the frequency of clock, Skew becomes more and more important performance index of FPGA, and how to accurately test the clock chip Skew is particularly important. This is based on JFPGA-YX2 chip as an example, introduces a precise measurement of FPGA clock Skew test method. The chip internal clock resources through the configuration logic configuration into a series of ring oscillator, oscillation frequency of each oscillator by the oscillator contains path delay decision. Measuring frequency of these oscillators are processed to obtain the exact value of the clock Skew.

【作者单位】： 无锡中微亿芯有限公司;中国电子科技集团公司第五十八研究所;
【基金】：国家科技重大专项资助项目(2015ZX01018101-005)
【分类号】：TN791
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本文编号：1531997