433MHz频段射频接收前端电路设计

发布时间：2018-03-01 03:33

本文关键词： 低功耗射频前端电路电流复用电容交叉耦合电流分流技术　出处：《东南大学》2015年硕士论文　论文类型：学位论文

【摘要】：无线射频芯片是通信系统电路的核心组成模块,它的性能直接决定整个通信系统的通信质量。射频接收前端电路作为无线射频芯片接收链路的重要组成部分,它的功耗占据整个收发芯片功耗的30%-40%。因而研究降低射频接收前端电路的功耗对降低整个收发芯片的功耗很有意义。论文主要设计工作在433MHz频段FSK接收模式的低功耗射频接收前端电路：低噪声放大器和下变频混频器。论文分析了射频前端电路的国内外研究现状,介绍了低噪声放大器和混频器的基本原理和主要性能参数,比较了一些常用的经典电路结构,结合系统要求设计出相应的电路结构：在低噪声放大器的设计中,为了避免使用直流负反馈电路,采用了将]PMOS晶体管层叠在NMOS晶体管之上的电流复用技术,同时针对该结构设计了相应的偏置电路；改进电容耦合结构,以增大低噪声放大器的等效输入跨导,提高电路的噪声性能；在混频器的设计过程中,首先针对低噪声放大器增益不足的现象,添加了一级放大电路,同时结合折叠设计方法,将该级放大电路与混频器的跨导级设计在同一支路,构成电流复用,达到降低功耗的目的；为了降低混频器的噪声系数,采用电流分流技术以降低流经开关管的电流；在混频器的输出端设计了电阻网络,控制电路的高低两种增益模式。基于SMIC 0.18μm RFCMOS工艺设计了电路和版图,并完成相应的仿真。仿真结果显示：在1.8V的电源电压下,整个前端电路在高增益模式下可以提供49.7dB的增益,低增益模式为45.03dB,前端电路的噪声系数约为6.75dB,三阶输入截断点IIP3约为-19dBm,整个电路消耗2.42mA的电流。
[Abstract]:Radio frequency chip is the core module of communication system circuit, and its performance directly determines the communication quality of the whole communication system. The RF receiver front-end circuit is an important part of the radio frequency chip receiving link. Its power consumption accounts for 30% of the total transceiver power consumption. Therefore, it is very important to reduce the power consumption of the RF receiver front-end circuit. This paper mainly designs and works on the low power of FSK receiving mode at 433MHz band. The RF receiver front-end circuit: low noise amplifier and down-conversion mixer. The research status of RF front-end circuit at home and abroad is analyzed in this paper. This paper introduces the basic principle and main performance parameters of low noise amplifier and mixer, compares some classical circuit structures, and designs the corresponding circuit structure according to the requirements of the system: in the design of low noise amplifier, In order to avoid the use of DC negative feedback circuits, the current multiplexing technique of stacking] PMOS transistors on top of NMOS transistors is adopted, and a corresponding bias circuit is designed for this structure, and the capacitive coupling structure is improved. In order to increase the equivalent input transconductance of the LNA and improve the noise performance of the circuit, in the design process of the mixer, the first stage amplifier circuit is added and the folding design method is combined with the phenomenon that the gain of the LNA is insufficient. In order to reduce the noise coefficient of the mixer, the current shunt technique is adopted to reduce the current flow through the switch tube, in order to reduce the noise coefficient of the mixer, the cross-conductance of the amplifier and the mixer are designed in the same branch circuit to form current multiplexing to achieve the purpose of reducing power consumption. The resistive network and the high and low gain modes of the control circuit are designed at the output end of the mixer. Based on the SMIC 0.18 渭 m RFCMOS process, the circuit and layout are designed, and the corresponding simulation is completed. The simulation results show that: under the power supply voltage of 1.8 V, The whole front-end circuit can provide 49.7 dB gain in high gain mode. The low gain mode is 45.03 dB, the noise coefficient of front-end circuit is about 6.75 dB, and the third-order input truncation point IIP3 is about -19 dBm.The whole circuit consumes 2.42 Ma current.
【学位授予单位】：东南大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN402

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