阻变FPGA关键技术的研究

发布时间：2018-03-09 14:40

本文选题：忆阻器　切入点：RRAM　出处：《电子科技大学》2016年硕士论文　论文类型：学位论文

【摘要】：随着集成电路工艺的不断演进,FPGA的集成度越来越高,功耗、面积及制造成本等与ASIC之间的差距越来越小,加之在动态可重构领域的优势,使其大有替代ASIC成为数字电路设计主要载体的趋势。然而,现今主流SRAM型FPGA使用掉电丢失数据的SRAM存储配置信息,上电时需要从片外非易失存储芯片如PROM或FLASH载入配置位流,使得这种FPGA的配置信息容易被窃取。PROM和FLASH占据了相当的板级面积,还增加了电路系统的尺寸。针对SRAM型FPGA存在的上述问题,本文从向SRAM型FPGA中集成忆阻器的角度提出了一种解决方案。忆阻器是一种新型存储器件,它具有非易失性和可重复编程性,还兼容标准CMOS工艺。利用忆阻器这一优点,本文将忆阻器与SRAM相结合,得到了一种ReSRAM编程点。基于这种编程点的阻变FPGA配置信息的安全性大大增强并能够快速上电启动,配置存储阵列能够被逐帧配置。本文还设计了基于这种编程点的非易失性查找表和可编程开关电路,以及针对阻变FPGA的编程通道与配置流程。本文使用基于忆阻器导电细丝原理的Verilog-AMS仿真模型和中芯国际0.13μm标准CMOS逻辑工艺库,在Cadence的AMS仿真平台下对文中的电路进行仿真验证。仿真与理论分析的结果表明:本文所设计的查找表能够完全兼容SRAM FPGA的查找表,而可编程开关的延迟也与SRAM型FPGA可编程开关的延迟没有任何区别,所设计的编程通道能够对ReSRAM编程点进行类似SRAM的回读和写入操作。这样就可以使用成熟的SRAM FPGA布局布线CAD软件,使阻变FPGA具有极高的兼容性和应用价值。
[Abstract]:With the continuous evolution of integrated circuit technology, the integration of FPGA becomes more and more high, the gap between power consumption, area and manufacturing cost and ASIC becomes smaller and smaller, and the advantages in dynamic reconfigurable field. However, the current mainstream SRAM FPGA uses SRAM to store configuration information of power loss data, so it is necessary to load the configuration bit stream from off-chip non-volatile memory chips such as PROM or FLASH when power on. The configuration information of this kind of FPGA is easily stolen. Prom and FLASH occupy a considerable area of board, and increase the size of circuit system. In this paper, a solution is proposed from the point of view of integrating resistive devices into SRAM type FPGA, which is a new type of memory device. It has the advantages of non-volatile, repeatable programming and compatible with standard CMOS process. In this paper, a kind of ReSRAM programming point is obtained by combining the resistor with SRAM. The security of the resistive FPGA configuration information based on this programming point is greatly enhanced and can be started quickly. The configuration storage array can be configured frame by frame. This paper also designs a nonvolatile lookup table and a programmable switch circuit based on this programming point. And the programming channel and configuration flow of resistive FPGA. In this paper, the Verilog-AMS simulation model based on the principle of resistive conductive filament and the SMIC 0.13 渭 m standard CMOS logic process library are used. The circuit in this paper is simulated on the AMS platform of Cadence. The results of simulation and theoretical analysis show that the look-up table designed in this paper can be fully compatible with the SRAM FPGA lookup table. The delay of the programmable switch is no different from that of the SRAM type FPGA programmable switch. The designed programming channel can read and write the ReSRAM programming points like SRAM, so that the mature SRAM FPGA layout and routing CAD software can be used, which makes the resistive FPGA have high compatibility and application value.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2016
【分类号】：TN791

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