基于FPGA的输电线路行波故障定位装置的研究和实现

发布时间：2018-03-18 13:51

本文选题：输电线路　切入点：故障行波　出处：《华东交通大学》2015年硕士论文　论文类型：学位论文

【摘要】：在电力系统中，输电线路是电力系统安全、稳定运行的关键，其故障直接威胁到电力系统的运行。因此，快速准确定位出故障发生地点并进行故障排除是保证电力系统安全、稳定运行的重要措施。针对这个问题，国内外已研制出多部行波故障测距装置并投入使用，获得了良好的结果。现在FPGA芯片的发展和小波变换信号处理技术将更加推进相关装置的研究。本论文主要完成基于FPGA的行波故障定位装置的硬件调试与FPGA硬件逻辑设计。其中包括装置内部所用硬件的调试、FPGA芯片模块总体框架、装置运行的总体流程和各个功能模块的实现。行波故障测距装置硬件有AD采集卡、FPGA芯片、SDRAM芯片、USB和LAN；各个功能模块使用Verilog HDL硬件语言编写，包括AD采样模块、小波滤波器模块、SDRAM存储模块和故障测距模块等。装置前端为AD采样模块，完成行波故障信号的快速、准确采集。小波滤波器模块对AD采样后的数据进行滤波，滤波系数为小波系数。小波滤波器采用FIR编译器的IP核设计，具有稳定性、灵活性且方便移植。故障测距模块通过阈值法提取行波波峰，故障距离算法采用单端法。SDRAM模块用于控制存储的行波数据，在用户需求时可以将数据上传至上位机。本文最后建立MATLAB输电线路故障仿真模型输出故障信号模拟量，再对整个装置进行SignalTapII仿真，测试其计算故障距离结果。通过验证，本文设计的行波故障测距装置可以有效实现单端法故障测距，符合工程实际需求。此外，本论文设计的行波故障测距装置硬件方面具有2个SDRAM和留有多个可扩展I/O口。双SDRAM可实现无间断存储数据；扩展I/O口可插入GPS芯片实现网络对时，从而可实现双端法故障测距。本论文设计的行波故障测距装置采用FPGA芯片完成，具有良好的灵活性和稳定性。为今后的行波故障测距装置的继续研发打下了良好的基础。
[Abstract]:In the power system, transmission line is the key to the safe and stable operation of the power system, and its faults directly threaten the operation of the power system. Therefore, it is necessary to quickly and accurately locate the fault location and troubleshoot the power system to ensure the safety of the power system. To solve this problem, many traveling wave fault location devices have been developed and put into use at home and abroad. The development of FPGA chip and wavelet transform signal processing technology will further promote the research of related devices. This paper mainly completes the hardware debugging and FPGA hardware logic design of the traveling wave fault location device based on FPGA, including the overall frame of the hardware debugging chip module used in the device. The hardware of the traveling wave fault location device includes AD acquisition card, FPGA chip, SDRAM chip, USB and LAN, and each function module is written in Verilog HDL hardware language, including AD sampling module. The wavelet filter module includes SDRAM storage module and fault location module. The front end of the device is AD sampling module, which completes the fast and accurate acquisition of traveling wave fault signal. The filter coefficient is wavelet coefficient. The wavelet filter is designed by IP core of FIR compiler, which is stable, flexible and easy to transplant. The fault location module extracts the traveling wave peak by threshold method. The fault distance algorithm uses single end method. SDRAM module is used to control the stored traveling wave data, and the data can be uploaded to the upper computer when the user needs it. Finally, the MATLAB transmission line fault simulation model is established to output the simulation quantity of the fault signal. Then the whole device is simulated by SignalTapII, and the result of calculating fault distance is tested. It is verified that the traveling wave fault location device designed in this paper can effectively realize the single-ended fault location, which is in line with the practical requirements of engineering. In addition, the traveling wave fault location device designed in this paper has two SDRAM and several extensible I / O ports. The dual SDRAM can store data without interruption, and the extended I / O port can be inserted into the GPS chip to realize network alignment. Thus, dual end fault location can be realized. The traveling wave fault location device designed in this paper is completed by FPGA chip, which has good flexibility and stability, which lays a good foundation for the further research and development of traveling wave fault location device.
【学位授予单位】：华东交通大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN791;TM75

【参考文献】