基于参数化模型的FPGA时钟网络设计和优化

发布时间：2018-03-20 11:05

本文选题：FPGA　切入点：时钟网络　出处：《电子学报》2017年07期 　论文类型：期刊论文

【摘要】：本文在FPGA时钟网络(Clock Distributed Network,CDN)关键结构尺寸的参数化建模基础上,提出一种针对全定制FPGA CDN的设计和优化方法.本文所建立的参数化模型将结构尺寸分为拓扑结构和电路与互连两类,分别给出了这两类尺寸参数的设计原则.在标准CMOS 0.13μm工艺下,对H树型、鱼骨型以及混合型三种类型时钟网络设计了2组结构参数,分别代表优化前和优化后,对比分析延时、偏斜、功耗和面积等性能参数.实验结果显示:混合型结构在绝对延时和时钟偏斜上减小最多,分别达到20.89%和63.20%;鱼骨型结构的面积减小达到50.14%;H树型结构的绝对延时和功耗则均降低了7.37%和8.33%.以上结果充分证明了本文所提设计优化方法的有效性.
[Abstract]:Based on the parameterized modeling of the key structural dimensions of FPGA clock Distributed Network, This paper presents a design and optimization method for fully customized FPGA CDN. The parameterized model established in this paper divides the structural dimensions into two categories: topology and circuit and interconnection. The design principles of these two kinds of dimension parameters are given respectively. Under the standard CMOS 0.13 渭 m process, two groups of structural parameters are designed for three types of clock networks, H tree type, fish bone type and hybrid type, representing the time delay before and after optimization, respectively. The experimental results show that the hybrid structure reduces the absolute delay and clock deflection the most. The absolute delay and power consumption of the fishbone structure are reduced by 7.37% and 8.33, respectively, and the area of the fishbone structure is reduced to 50.14. The effectiveness of the proposed design optimization method is fully proved by the above results.
【作者单位】：北京工商大学计算机与信息工程学院食品安全大数据技术北京市重点实验室;中国科学院微电子学研究所中国科学院微电子器件与集成技术重点实验室;
【基金】：北京市自然科学基金(No.4174086)
【分类号】：TN791

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