折叠共源共栅放大器单粒子效应电荷抵消加固技术

发布时间：2018-03-21 16:13

本文选题：模拟电路　切入点：折叠共源共栅放大器　出处：《哈尔滨工业大学》2015年硕士论文　论文类型：学位论文

【摘要】：随着各国航空航天事业的不断发展,越来越多的电子系统运用于航天设备中。而电子元器件一旦暴露在温度多变、辐射强度极高的太空环境中,其可靠性将势必受到严重影响。集成电路的工艺尺寸不断缩减,时钟频率,各类寄生效应的影响不断增加,这些因素促使国内外对辐射效应的研究逐渐聚焦在模拟电路的单粒子瞬态效应(SET)上,SET效应成为所有单粒子效应(SEE)中对软错误率贡献最大的辐射效应。在模拟电路中,单个高能粒子撞击器件敏感节点时,会在器件内部产生过量载流子从而引起在电路总输出电压的瞬态波动。基于运算放大器在模拟以及混合电路设计中的重要地位以及SET效应研究的必要性,本文选定折叠共源共栅放大器作为研究对象,主要对SET效应的作用机理及敏感性进行分析并分别针对放大器电路的各组成部分采用两种电荷抵消加固方法并进行了相应的分析和验证。首先在对模拟电路中的SET效应作用机理及影响进行详细了解的基础上,采用SMIC 0.18μm工艺,设计出符合一定性能指标的折叠共源共栅放大器电路;然后运用工艺计算机辅助设计系统(TCAD)建模工具选取出放大器各部分的SET敏感节点。在此过程中首先要对电路中的各MOS器件进行多维建模并运用建立好的模型对整体电路进行混合仿真研究,之后采用临界电荷值、总输出Vout发生翻转的瞬变脉宽以及波谷值等参数对放大器敏感节点进行选取;最后,对电路各部分敏感节点进行抗SET效应加固设计,运用多敏感节点自电荷抵消技术(M-SNACC)以及差分电荷抵消(DCC)布局技术分别对运算放大器进行电路级和版图级的加固设计。给出整体加固版图及相应仿真结果并对加固前后放大器各性能指标的变化进行研究分析。
[Abstract]:With the continuous development of aerospace industry in various countries, more and more electronic systems are used in spaceflight equipment, and once electronic components are exposed to variable temperature and extremely high radiation intensity in space environment, Its reliability is bound to be seriously affected. The process size of integrated circuits is continuously reduced, and the effects of clock frequency and parasitic effects are increasing. These factors have led to the study of radiation effects at home and abroad, focusing gradually on the single particle transient effect (set) of analog circuits, which has become the largest contribution to soft error rate of all single particle effects (SEE). In analog circuits, When a single high-energy particle impacts the sensitive node of the device, It can cause transient fluctuations in the total output voltage of the circuit due to excessive carriers in the device. Based on the importance of operational amplifiers in analog and hybrid circuit design and the necessity of studying the SET effect, In this paper, the folded common-gate amplifier is chosen as the research object. The mechanism and sensitivity of SET effect are analyzed, and two kinds of charge canceling reinforcement methods are adopted for each component of amplifier circuit respectively. On the basis of detailed understanding of the mechanism and effect of SET effect, By using SMIC 0.18 渭 m process, a folded common-gate amplifier circuit with certain performance index is designed. Then the SET sensitive nodes of each part of the amplifier are selected by using the process computer aided Design (CAD) modeling tool. In this process, the multi-dimensional modeling of each MOS device in the circuit is carried out and the integrated model is applied to the whole circuit. The hybrid simulation of bulk circuit is carried out. Then the critical charge value, transient pulse width and trough value of total output Vout are used to select the sensitive node of amplifier. Finally, the anti-#en1# effect reinforcement design of each sensitive node of the circuit is carried out. Using multi-sensitive node self-charge canceling technique (M-SNACC) and differential charge canceller (DCC-DCC), the circuit level and layout level of the operational amplifier are designed respectively. The overall reinforcement layout and corresponding simulation results are given and the reinforcement results are given. The changes of each performance index of the amplifier before and after are studied and analyzed.
【学位授予单位】：哈尔滨工业大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN722

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