基于FPGA高速通用串行接口的设计与应用

发布时间：2018-04-01 23:36

本文选题：FPGA　切入点：Serial　出处：《西安电子科技大学》2015年硕士论文

【摘要】：伴随数字信号处理技术的快速发展,数据吞吐量与日俱增,给数据传输带来了新的挑战。高速串行传输系统的出现在一些领域取代了并行数据传输,提高了传输速率,降低了系统成本和设计难度。采用FPGA为核心的通用高速串行接口模式已经逐渐成为实现高速数字信号处理平台的重要实现手段。本文的主要研究内容如下:首先,较为详细的介绍了Xilinx公司FPGA芯片内置的高速串行接口——吉比特收发器(GTP)。从其应用领域,到内部结构,再到工作原理,阐述了Xilinx FPGA内置的吉比特收发器适用于高速串行传输应用。对Xilinx公司的GTP设计和使用的原理、配置方法进行了简单介绍,并利用仿真平台对GTP的设计思路和结果进行了详实地验证。其次,依托Rapid IO协议的基本内容,提供了基于Xilinx FPGA的SRIO接口设计的原理,并给出了基于SRIO为接口的高速信号处理系统的设计思路,通过构建SRIO通用硬件测试平台,对SRIO的多种工作模式进行了仿真、测试。验证了基于FPGA的SRIO接口的系统设计,并对基于SRIO高速接口的性能进行了详实的分析和测试。之后,基于PCI Express协议给出了基于PCI-E接口的内存设备的设计思路,通过搭建PCI Express硬件测试平台,对其的数据读写操作进行了相关测试。验证了基于FPGA的PCI Express接口的系统设计,并对基于PCI Express高速接口的性能进行了分析与测试。最后,以SATA协议多层结构为基础,阐述了基于Xilinx公司的FPGA的SATA控制器设计的原理,并给出了基于SATA的硬盘主控制器的设计思路,通过搭建SATA硬件测试平台,对其的数据读写操作进行了相关测试。验证了基于FPGA的SATA接口的系统设计,并对基于SATA高速接口的性能进行了分析与测试。本文通过FPGA平台实现了多种高速串行传输系统,详述了系统设计思路,并提供了相关测试与验证。设计中,采用基于FPGA的高速串行传输系统,可以简化设计,降低成本,改善系统性能。
[Abstract]:With the rapid development of digital signal processing technology, data throughput is increasing, which brings new challenges to data transmission.The emergence of high-speed serial transmission system has replaced the parallel data transmission in some fields, which improves the transmission rate and reduces the system cost and design difficulty.The universal high speed serial interface mode with FPGA as the core has gradually become an important means to realize the high speed digital signal processing platform.The main contents of this paper are as follows: firstly, the high speed serial interface (Gigabit transceiver), which is built into Xilinx FPGA chip, is introduced in detail.From its application field, internal structure, and working principle, this paper expounds that Xilinx FPGA built-in Gigabit transceiver is suitable for high-speed serial transmission applications.The principle and configuration method of GTP design and application of Xilinx Company are briefly introduced, and the design ideas and results of GTP are verified in detail by using the simulation platform.Secondly, based on the basic content of Rapid IO protocol, the design principle of SRIO interface based on Xilinx FPGA is provided, and the design idea of high speed signal processing system based on SRIO interface is given.The simulation and test of various working modes of SRIO are carried out.The system design of SRIO interface based on FPGA is verified, and the performance of high speed interface based on SRIO is analyzed and tested in detail.Then, the design idea of memory device based on PCI-E interface is given based on PCI Express protocol, and the data read and write operation of PCI Express is tested by building PCI Express hardware test platform.The system design of PCI Express interface based on FPGA is verified, and the performance of high speed interface based on PCI Express is analyzed and tested.Finally, based on the multi-layer structure of SATA protocol, the design principle of SATA controller based on FPGA of Xilinx company is expounded, and the design idea of main controller of hard disk based on SATA is given. The hardware testing platform of SATA is built.The data read and write operations are tested.The system design of SATA interface based on FPGA is verified, and the performance of high speed interface based on SATA is analyzed and tested.In this paper, a variety of high speed serial transmission systems are implemented on FPGA platform. The design ideas of the system are described in detail, and the relevant testing and verification are provided.In the design, the high speed serial transmission system based on FPGA can simplify the design, reduce the cost and improve the system performance.
【学位授予单位】：西安电子科技大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN791;TN911.72;TN914

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