基于FPGA的FIR数字滤波器设计与实现

发布时间：2018-04-07 00:16

  本文选题：FPGA　切入点：DSP　出处：《现代电子技术》2013年14期

【摘要】：简要介绍了FIR数字滤波器的结构特点和基本原理,提出基于FPGA和DSP Builder的FIR数字滤波器的基本设计流程和实现方案。在Matlab/Simulink环境下,采用DSP Builder模块搭建FIR模型,根据FDATool工具对FIR滤波器进行了设计,然后进行系统级仿真和ModelSim功能仿真,其仿真结果表明其数字滤波器的滤波效果良好。通过SignalCompiler把模型转换成VHDL语言加入到FPGA的硬件设计中,从QuartusⅡ软件中的虚拟逻辑分析工具SignalTapⅡ中得到数字滤波器实时的结果波形图,结果符合预期。
[Abstract]:This paper briefly introduces the structure and principle of FIR digital filter, and puts forward the basic design flow and implementation scheme of FIR digital filter based on FPGA and DSP Builder.In the Matlab/Simulink environment, the FIR model is built with DSP Builder module, and the FIR filter is designed according to the FDATool tool. Then the system level simulation and ModelSim function simulation are carried out. The simulation results show that the digital filter has good filtering effect.The model is transformed into VHDL language by SignalCompiler and added to the hardware design of FPGA. The result waveform of digital filter in real time is obtained from SignalTap 鈪，

本文编号：1719548