基于金属氧化物的薄膜器件

发布时间：2018-04-17 12:48

本文选题：薄膜晶体管 + 非晶氧化铟镓锌　；参考：《山东大学》2016年硕士论文

【摘要】：近十几年来,薄膜晶体管(Thin Film Transistor, TFT)已经成为当前的研究热点,并且得到了广泛的应用,它将有望成为下一代显示器的驱动元件。随着新型半导体材料的出现及相关研究工作的深入,进一步提升了基于新材料的薄膜晶体管的研究价值。本论文主要研究两种基于新型半导体材料的薄膜晶体管：基于具有极大研究价值的n型半导体材料——非晶氧化铟镓锌(amorphous indium gallium zinc oxide, a-IGZO) TFT和基于具有巨大潜力的p型半导体材料——氧化亚锡(SnO)TFT。(1)具有优良性能的a-IGZO TFT的制备及工艺摸索基于大量关于a-IGZO TFT的文献调研,综合比较不同课题组所选用的器件结构、具体材料及器件性能,并结合本实验室自身的设备条件及特色,最终选择了底栅结构的制备工艺：首先选用掺杂高浓度的p型硅片(Si)作为器件的衬底,同时也作为器件的栅电极；然后通过热氧化的方法在硅片上生长一层结构致密的二氧化硅(SiO2)作为器件的绝缘层；然后利用磁控溅射工艺在SiO2上沉积一层a-IGZO作为有源层；最后使用电子束蒸发仪在a-IGZO上生长金属钛(Ti)作为源电极和漏电极。由于Si衬底掺杂均匀且SiO2表面极其平整,所以制备所得的器件具有很好的稳定性和重复性。基于以上结构,本文分别研究了有源层(a-IGZO)厚度、后期热退火处理和后期封装处理对于a-IGZOTFT性能的影响。后期热退火处理是使样品处于高温的环境中进行烘烤,a-IGZO中的晶格振动在周围的环境中吸收热量而得到增强,而晶格振动会一定程度地增加原子排列的有序性,减少缺陷数目,使有效载流子数目增加,从而改善了器件性能。后期封装处理技术对于器件性能的影响主要表现在两个方面：一方面通过将器件与外界影响因素隔离来提高器件的稳定性；另一方面是通过改善封装材料与有源层的接触界面的状况来提高器件性能。本文还研究了有源层厚度对于器件性能的影响,随着有源层厚度的降低(5nm),器件性能急剧恶化,不再受到栅极电压的调控作用,但是通过综合利用后期热退火和后期封装技术,实现了超薄a-IGZOTFT性能的极大改善。除此之外,本文还介绍了基于a-IGZO的电双层(Electric double layers, EDL) TFT的制备工艺,研究了电解质浓度对EDLTFT电学性能的影响。最终可以使得器件在极低的电压(1V)条件下开启。(2)制备氧化亚锡晶体管与工艺摸索基于最新的文献调研,并考虑实验室的设备条件,选用了底栅结构制备Sn0TFT,基本步骤如下：选用康宁7059玻璃作为衬底,在清洗干净的衬底上采用电子束蒸发的工艺生长双层金属钯／钛(Pd/Ti)作为栅电极,然后利用磁控溅射的工艺生长一层Ta2O5作为绝缘层,有源层SnO的生长同样是利用磁控溅射的工艺,最后采用电子束蒸发在有源层上生长Pd金属作为源、漏电极。在以上结构的基础上,本文分别研究了栅极结构、Ta205性能及源、漏电极材料选择对于器件性能的影响。选用双层金属作为器件的栅极可以很好地解决测试时扎针困难的问题,通过退火改善Ta205的绝缘性对于器件性能至关重要。选择高功函数的金属钯作为源、漏电极可以最大可能的实现欧姆接触,从而优化器件性能。
[Abstract]:In recent years, the thin film transistor (Thin Film, Transistor, TFT) has become a research hotspot, and has been widely used, it is expected to become the driving element of the next generation of display. With the appearance of new semiconductor materials and related research, to further enhance the value of the new material for the thin film transistor based on this paper mainly studies two kinds of thin film transistor model based on semiconductor materials, has great research value of the N type semiconductor material - amorphous indium gallium zinc oxide (amorphous indium gallium zinc based on oxide, a-IGZO TFT) and P type semiconductor material with great potential based on tin oxide (SnO) TFT. (1) the preparation process and the excellent performance of a-IGZO TFT a-IGZO TFT found a large number of literature research based on the comprehensive comparison of different device structures research group selected, specific Material and device performance, combined with the laboratory equipment conditions and characteristics, finally chose the bottom gate structure of the preparation process: first choose the P type silicon doped with high concentration (Si) as a device substrate, but also as the gate electrode of the device; and a layer of dense silica growth on silicon wafer by the method the thermal oxidation (SiO2) as an insulating layer of the device; then using magnetron sputtering to deposit a layer of a-IGZO on the SiO2 as the active layer; the growth of titanium in a-IGZO using electron beam evaporation instrument (Ti) as a source electrode and a drain electrode. The Si and SiO2 doped substrate surface is extremely smooth, so business the device prepared has good stability and repeatability. Based on the above structure, this paper studies the active layer (a-IGZO) thickness, post thermal annealing and post processing package for the performance of a-IGZOTFT. Ring. Post thermal annealing is the sample in the baking temperature environment, the lattice vibration of a-IGZO in the environment of heat absorption is enhanced, and the lattice vibration will be improved to a certain extent ordered atomic arrangement, reduce the number of defects, the effective carrier number increase, thereby improving the performance of the device effect of post processing technology for packaging. The device performance is mainly manifested in two aspects: on the one hand through the isolation device and the external influence factors to improve the stability of the device; on the other hand is to improve the packing material and the condition of contact interface source layer to improve the performance of the device. This paper also studied the effects of active layer thickness on the the performance of devices, with the decrease of active layer thickness (5nm), the performance of the device is no longer a sharp deterioration of the gate voltage regulation, but through the comprehensive utilization after thermal annealing And post packaging technology, realizes the greatly improved performance of ultra-thin a-IGZOTFT. In addition, this paper also introduces the a-IGZO electric double layer (Electric double layers EDL, based on the preparation process of TFT), studied the effect of electrolyte concentration on the electrical properties of EDLTFT. Finally makes the device in low voltage (1V) under the condition of opening. (2) the preparation of stannous oxide transistor and process to explore the latest research based on literature, and consider the equipment in the laboratory conditions, the bottom gate structure was prepared by Sn0TFT, the basic steps are as follows: 7059 using Corelle glass as substrate, the growth of double metal palladium / titanium process by electron beam evaporation at clean the substrate (Pd/Ti) as a gate electrode, and then growing a layer of Ta2O5 as insulating layer by magnetron sputtering technology, active layer growth of SnO is to use the same technology of magnetron sputtering, finally by electron beam evaporation at The active layer growth of Pd metal as the source and drain electrodes. Based on the above structure, this paper studies the structure and property of Ta205 gate, source, drain material selection effect on device performance. By using double metal as the device gate can tie pin difficult problem solved well when tested by Ta205 improvements the insulation performance of the device for annealing. It is very important to choose high work function metal palladium as the source, drain ohmic contact can be achieved the maximum possible, so as to optimize the performance of the device.

【学位授予单位】：山东大学
【学位级别】：硕士
【学位授予年份】：2016
【分类号】：TN321.5

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