Ka波段小步进宽带频率源的研究与硬件实现

发布时间：2018-04-23 04:42

本文选题：DDS + PLL　；参考：《南京理工大学》2015年硕士论文

【摘要】：随着通信系统技术的不断向前进步,系统对频率源的准确度、稳定度以及频谱的纯度有了更高的要求,单一的频率合成技术已经很难满足设计的需要。锁相频率合成已经是一项很成熟的技术,它具有输出频率高和杂散抑制度好的特点。DDS技术虽然有着低相位噪声和频率分辨率高的优势,然而杂散抑制较差以及输出频率较低。本课题设计的目的正是将两种频率合成技术各自的优点结合起来,从而设计出高性能的Ka波段小频率步进宽带频率源。论文在对DDS与PLL理论分析的基础上,讨论了DDS+PLL技术相结合使用的几种方案,并且分析了每一种方案的优缺点。然后结合论文指标的具体要求,选择了一种适合的方案,并在该方案的基础上,进行芯片的选型与指标符合性分析。最后是硬件电路的设计与调试,电路在结构方面运用分腔模块化设计,既简化了整个电路设计的复杂性,又使电路调试变得方便。电路在设计方面采用DDS直接激励PLL的合成方案,研制了Ka波段(27GHz-30GHz)小步进宽带频率源。经过调试后,频率源能在该频段内实现10kHz频率间隔的任意输出；相噪达到了-52dBc/Hz@10Hz、-63dBc/Hz@100Hz、-72.8dBc/Hz @1kHz、-80.7dBc/Hz@10kHz、-90.1dBc/Hz @100kHz；杂散抑制度达到68dBc；输出功率不小于11.8dBm,符合设计指标。
[Abstract]:With the continuous progress of communication system technology, the system has higher requirements for the accuracy, stability and spectrum purity of the frequency source. The single frequency synthesis technology has been difficult to meet the needs of the design. Phase locked frequency synthesis has been a very mature technology, which has the characteristics of high output frequency and good stray suppressor system.DD. Although the S technology has the advantages of low phase noise and high frequency resolution, the stray suppression is poor and the output frequency is low. The purpose of this project is to combine the advantages of the two frequency syntheses, and then design a high performance Ka band small frequency step wideband frequency source. The thesis is based on the theoretical analysis of DDS and PLL. On the basis of this, several schemes of DDS+PLL technology are discussed, and the merits and demerits of each scheme are analyzed. Then a suitable scheme is chosen according to the specific requirements of the paper index. On the basis of this scheme, the selection of the chip and the conformity analysis of the index are carried out. Finally, the design and debugging of the hardware circuit and the electricity are made. The modular design of the split cavity is used in the structure, which not only simplifies the complexity of the whole circuit design, but also makes the circuit debugging easier. In the design of the circuit, the DDS direct excitation PLL synthesis scheme is adopted in the design, and the Ka band (27GHz-30GHz) small step broadband frequency source is developed. After the commissioning, the frequency source can realize the 10kHz frequency within the frequency band. Arbitrary output of the septum; phase noise reached -52dBc/Hz@10Hz, -63dBc/Hz@100Hz, -72.8dBc/Hz @1kHz, -80.7dBc/Hz@10kHz, -90.1dBc/Hz @100kHz; the stray suppression system reached 68dBc; the output power was not less than 11.8dBm, which accorded with the design index.

【学位授予单位】：南京理工大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN741

【参考文献】