CMOS射频接收集成电路关键技术研究与设计实现

发布时间：2018-04-26 15:47

本文选题：CMOS射频接收集成电路 + 多带宽频点滤波器带宽校准　；参考：《国防科学技术大学》2015年博士论文

【摘要】：射频无线通信技术的诞生和发展带来了人类社会信息化程度的高度发达,作为底层技术支撑器件,射频集成电路一直是该领域内的研究热点。本文的关注点集中在CMOS射频接收集成电路上,立足于通信需求、架构需求、频率需求以及链路预算需求四个方面,深入地挖掘了在射频接收集成电路设计时需要解决的关键技术问题,并提出最优化解决方案。本文所述之关键技术可概括如下:1)在考虑寄生效应的情况下,详细总结了宽带射频接收机匹配电路的各种设计方法和设计过程,并给出窄带射频接收机同时实现功率匹配和噪声匹配的设计方法和步骤;2)针对窄带射频接收机,提出了基于LC谐振频率较准以及Q增强技术的高线性射频前端设计方法;3)针对宽带多带宽频点通信系统,提出了一种基于搜索比较算法的滤波器带宽较准电路,增加了滤波器调谐带宽的自由度,减小了滤波器的设计复杂度,并节省了芯片面积;4)针对零中频架构射频接收机,提出了数字辅助静态直流偏移较准和数字域动态直流偏移较准相结合的直流偏移消除方法,可以快速高效的校准由于接收机自身以及外部干扰所引起的直流偏差,确保接收机正常工作;5)针对低中频架构射频接收机,提出了基于恒定噪声功率谱密度的自适应I/Q通路失配较准算法以提高接收机的镜象抑制比;6)针对宽范围频率综合器,给出了保证锁相环环路带宽及环路稳定性的一般性设计方法,并提出了基于误差补偿的频率综合器快速锁定设计方法;7)针对接收机链路预算,提出了一种基于无失真动态范围的链路预算方法,可以对各模块的噪声系数和线性性能指标进行准确的预估和分配。同时,通过两个应用案例,三个设计实例来验证所述之关键技术,三款设计实例分别采用宽带-零中频架构,窄带-低中频架构的设计策略来验证相应的关键技术,通信系统分别针对DVB-S/S2ABS-S,多模GNSS。同时每个设计实例自成体系,内容从系统级到模块级再到最终的测试,为实际接收机的设计提供借鉴。
[Abstract]:The birth and development of radio frequency wireless communication technology has brought a high degree of information development in human society. As the underlying technology support device, RF integrated circuit has been a research hotspot in this field. The focus of this paper is on CMOS RF receiver integrated circuits, based on four aspects: communication requirements, architecture requirements, frequency requirements and link budget requirements. The key technical problems needed to be solved in the design of RF receiver integrated circuits are deeply explored, and the optimization solutions are put forward. The key techniques described in this paper can be summarized as follows: (1) considering the parasitic effect, the various design methods and design process of the matching circuit for wideband radio frequency receiver are summarized in detail. The design method and step of realizing both power matching and noise matching for narrowband RF receiver are given. In this paper, a high linear RF front-end design method based on LC resonance frequency accuracy and Q enhancement technique is proposed. For broadband multi-bandwidth frequency point communication system, a filter bandwidth quasi-circuit based on search comparison algorithm is proposed. The degree of freedom of filter tuning bandwidth is increased, the complexity of filter design is reduced, and the chip area is saved. In this paper, a digital auxiliary static DC offset is proposed, which combines the digital auxiliary static DC migration with the digital domain dynamic DC offset. It can quickly and efficiently calibrate the DC offset caused by the receiver itself and the external interference. To ensure the normal operation of the receiver, an adaptive I / Q path mismatch algorithm based on constant noise power spectral density is proposed to improve the receiver's image rejection ratio (RRR) 6) for a wide range frequency synthesizer, a novel adaptive I / Q channel mismatch algorithm based on constant noise power spectral density is proposed. A general design method to guarantee the bandwidth and stability of the PLL loop is given, and a fast locking design method of frequency synthesizer based on error compensation is proposed. A link budget method based on the dynamic range of distortion is proposed, which can accurately estimate and allocate the noise coefficient and linear performance index of each module. At the same time, through two application cases, three design examples to verify the key technology, three design examples of wideband-zero intermediate frequency architecture, narrow band-low intermediate frequency architecture design strategy to verify the corresponding key technologies, The communication system is aimed at DVB-S / S 2 ABS-S and multi-mode GNSS respectively. At the same time, each design example has its own system, from system level to module level to final test, which provides reference for the design of actual receiver.
【学位授予单位】：国防科学技术大学
【学位级别】：博士
【学位授予年份】：2015
【分类号】：TN432

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