用于脑电信号记录的低噪声低功耗放大器
本文选题:放大器 + 脑电信号(EEG) ; 参考:《半导体技术》2017年08期
【摘要】:为了满足脑电信号(EEG)记录阵列的应用需求,设计了一种全差分的低噪声、低功耗放大器电路。该电路利用亚阈值区晶体管作为伪电阻,与输入电容和反馈电容形成高通通路,有效抑制了输入信号的直流失调电压,无需片外隔直电容,实现了电路的全集成。放大器中的跨导放大器(OTA)采用亚阈值晶体管进行设计,实现了较大的输出摆幅、良好的功耗和噪声性能。放大器电路采用SMIC 130 nm 1P8M混合信号工艺实现,芯片面积0.6 mm~2。测试结果表明,在电源电压0.6 V时,放大器可处理信号带宽为10 Hz~7 kHz,等效输入噪声的均方根值为3.976μV,噪声有效因子为3.658,总功耗仅为2.4μW。
[Abstract]:In order to meet the requirements of EEG recording array, a fully differential low noise and low power amplifier circuit is designed. The circuit uses sub-threshold transistor as pseudoresistor and forms a high-pass path with input capacitance and feedback capacitance, which effectively restrains the DC offset voltage of input signal, and does not need the out-of-chip capacitance to realize the full integration of the circuit. The transconductance amplifier (OTA) in the amplifier is designed with sub-threshold transistor, which achieves large output swing, good power consumption and noise performance. The amplifier circuit is realized by SMIC 130nm 1P8M mixed signal technology. The chip area is 0.6 mm / 2. The test results show that when the power supply voltage is 0.6 V, the signal bandwidth is 10 Hz~7 kHz, the root mean square value of the equivalent input noise is 3.976 渭 V, the noise efficiency factor is 3.658, and the total power consumption is only 2.4 渭 W.
【作者单位】: 厦门理工学院光电与通信工程学院;
【基金】:国家自然科学基金资助项目(61306039)
【分类号】:TN722.3
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