基于CMOS工艺的太赫兹成像读出电路阵列的研究

发布时间：2018-05-02 20:23

本文选题：太赫兹 + CMOS　；参考：《北京理工大学》2015年硕士论文

【摘要】：太赫兹技术从技术发展之初就得到了科学各界的高度关注，特别是太赫兹成像系统被广泛应用于医学成像，机场安检和物质检测领域，得到了深入地研究。而半导体工艺的发展，使得利用集成电路技术实现低成本和便携式太赫兹成像系统有了可能。因此，本文将利用CMOS集成电路工艺，设计可应用于太赫兹FET平方律直接检波成像系统的读出电路阵列。本文的主要内容如下：首先，本文分析了FET平方律检波的原理，并在此基础上说明了基于该成像原理的读出电路的设计要求与要点。接着，本文又对读出电路中的噪声进行了分析，并对CMOS中的MOS管进行了小信号模型和噪声模型的建模，，进一步指明了在低频下读出电路的设计要点是f噪声和直流失调的消除。其次，基于前面的理论分析，本文设计了可用于太赫兹成像系统的读出电路阵列。整个读出电路阵列由五部分构成：像元内前置放大器，相关双采样保持电路，输出缓冲级电路以及用于对读出阵列顺序寻址的行列移位寻址寄存器。像元内采用开环前置放大器一方面可以为极其微弱的检波器输出信号提供足够的增益，另一方面还使得信号免受开关噪声的影响。相关双采样技术的应用进一步提高了读出电路的噪声性能，同时消除了前置放大器直流失调的影响。为了便于将信号输出，进行进一步的信号处理，本文还设计了单位增益的输出缓冲级电路。利用行列移位寄存器，实现44读出阵列的串行输出。最后，整个读出电路阵列在Cadence IC仿真软件中进行了仿真，并且绘制了版图。仿真结果表明，前置放大器可以提供75dB的直流增益，单个读出电路通道上的等效输入噪声为25fV2Hz1/2。整个读出电路在1.8V供电下消耗了不到16mA的电流，整个版图的面积为433μm354μm的面积。
[Abstract]:Terahertz technology has received great attention since the beginning of technology development, especially the terahertz imaging system has been widely used in the field of medical imaging, airport security and material detection, and has been deeply studied. The development of semiconductor technology makes it possible to realize low cost and portable terahertz imaging system using integrated circuit technology. Therefore, a readout circuit array which can be applied to terahertz FET square law direct detection imaging system is designed by using CMOS integrated circuit technology. The main contents of this paper are as follows: Firstly, the principle of FET square law detection is analyzed, and the design requirements and key points of the readout circuit based on the principle are explained. Then, the noise in the readout circuit is analyzed, and the small signal model and noise model of the MOS transistor in CMOS are modeled. It is further pointed out that the key point of the readout circuit at low frequency is the elimination of f noise and DC misalignment. Secondly, a readout circuit array for terahertz imaging system is designed based on the previous theoretical analysis. The whole readout circuit array is composed of five parts: an internal pixel preamplifier, a correlated double sampling and holding circuit, an output buffer level circuit and a row shift addressing register for sequential addressing of the readout array. Using an open-loop preamplifier in the pixel can provide enough gain for the very weak geophone output signal on the one hand, and protect the signal from switching noise on the other hand. The application of correlation double sampling technology further improves the noise performance of the readout circuit and eliminates the influence of DC misalignment of the preamplifier. In order to output the signal and process the signal further, the output buffer stage circuit with unit gain is designed in this paper. The serial output of 44 readout array is realized by using column shift register. Finally, the whole readout circuit array is simulated in Cadence IC simulation software, and the layout is drawn. The simulation results show that the preamplifier can provide the DC gain of 75dB, and the equivalent input noise on a single readout circuit channel is 25fV2Hz1 / 2. The whole readout circuit consumes less than 16mA current under 1.8 V power supply, and the whole layout area is 433 渭 m 354 渭 m.
【学位授予单位】：北京理工大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN432

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