用于中国自主标准RFID标签芯片设计的平台搭建与验证

发布时间：2018-05-13 08:22

本文选题：IC设计平台 + 中国自主标准　；参考：《西安电子科技大学》2015年硕士论文

【摘要】：RFID是Radio Frequency Identification的简称,是通过高频或者超高频射频载波信号传输数据的一种短距离无线通信技术。随着移动通信技术的飞速发展,IoE(Internet of Everything)等物联网概念逐渐成为现实,RFID技术又成为了产学研关注的热点。RFID是关系到国家信息安全的技术和应用,国家早在2006年就出台了相关政策,然后在2009年由相关单位起草并制定了中国自主标准协议,该协议不断被修订和完善,基于该协议的标签芯片、阅读器和系统应用不断被设计开发出来。但是受限于设计和制造水平,标签芯片大都是功耗过高、通信距离过短,无法实现大规模的商用,也无法与国外同类产品在市场中竞争。近两年来,在国家的大力支持和引导下,集成电路产业进入了高速发展的阶段。集成电路产业人才数量的不足、人才质量偏低、高校与产业严重脱轨等的问题日益突出,这也是我国集成电路产业要强力起飞最大的束缚之一。高校的实验室环境是这些人才进入产业前最后的训练场,实验室项目是培养能力和积累经验最好的途径。而本文的作者发现,很多集成电路设计方向的实验室的设计平台效率低下,采用的设计方法落后,服务器硬件资源被严重浪费,无法利用EDA(Electronic Design Automation)工具的先进性和高性能,这就大大的增加了完成项目所用的时间,也就减少了学习其他更先进的更接近产业的IC(Integrated Circuit)设计方法的时间。本文作者所在的实验室也存在类似的问题,由于没有规范的设计平台与流程,设计与验证的效率比较低下。本文在Linux操作系统上,基于Linux Shell语言和Tcl/Tk语言,结合对主流的Synopsys的IC设计、实现、验证EDA工具的深入学习和理解,分析了搭建高效的IC设计平台所需要的关键技术,设计了该平台所需的所有脚本程序。本文搭建的平台包括代码版本控制系统、仿真验证脚本生成程序和逻辑综合脚本生成程序三部分。平台中的代码版本控制系统,能帮助IC设计者高效管理代码的版本,分为Linux Shell语言设计的代码检入子系统和Tcl/Tk设计的代码检出GUI(Graphical User Interface)子系统。平台中的仿真验证脚本生成程序由Tcl/Tk设计,能帮助IC设计者经过简单的选项设置,就能生成仿真验证工具VCS-MX所需的Makefile脚本。平台中的逻辑综合脚本生成程序由Tcl/Tk设计,能帮助IC设计者快速地生成符合自己设计要求的综合脚本。在本文设计的IC设计平台上,基于中国自主标准RFID协议,结合对芯片设计实现的理解,分析了设计标签芯片基带电路所需要的包括低功耗设计方法在内的关键技术,设计了基带的Verilog代码,完成了综合前的功能验证、基于DesignCompiler的逻辑综合、基于PrimeTime PX的功耗分析,最终在基于FPGA(Field Programmable Gate Array)的板级系统上实现了与阅读器的联合验证。本文设计的基带电路在几乎不增加面积的情况下,相比基于同样协议的上一代设计,功耗降低了大约30%,并在与阅读器和联合验证中,协议一致性测试完全通过;由于采用了本文搭建的IC设计平台,使得整个芯片的设计、实现、验证时间大大的减少了,极大地提高了完成项目的效率。这也验证了本文所搭建的芯片设计平台在功能上的正确性和实用性。本文搭建的IC设计平台在实验室的其他项目中也被广泛的采用,收到了很好的效果;如果能经过进一步的完善,可以在其他的高校实验室进行推广使用。本文所设计的标签芯片已经顺利地进入流片阶段。
[Abstract]:RFID is the abbreviation of Radio Frequency Identification, a short distance wireless communication technology that transmits data through high frequency or UHF carrier signal. With the rapid development of mobile communication technology, the concept of Internet of things such as IoE (Internet of Everything) has gradually become a reality, and RFID technology has become a hot.RFID of the research and research research. It is related to the technology and application of national information security. The state promulgated relevant policies in 2006, and then drafted and formulated the Chinese independent standard protocol in 2009 by relevant units. The protocol is constantly revised and perfected. The label chip based on the protocol, reader and system applications have been designed and developed continuously. At the level of design and manufacture, most of the label chips are too high power consumption, too short communication distance, can not achieve large-scale commercial use, and can not compete with foreign products in the market. In the last two years, under the strong support and guidance of the state, the integrated circuit industry has entered the stage of high speed development. The problem of low quality and serious derailment of universities and industries is becoming more and more serious. This is one of the biggest constraints in the strong take-off of the integrated circuit industry in China. The laboratory environment in Colleges and universities is the last training field before these talents enter the industry. The laboratory project is the best way to cultivate ability and accumulate experience. The author of this paper finds that The design platform of a lot of integrated circuit design directions is inefficient, the design method is backward, the hardware resources of the server are badly wasted, the advanced and high performance of the EDA (Electronic Design Automation) tool can not be used. This greatly increases the time used to complete the project, and reduces the other more advanced learning. The time in which the IC (Integrated Circuit) design method is closer to the industry. There are similar problems in the laboratory of the author. Because there is no standard design platform and process, the efficiency of design and verification is relatively low. On the Linux operating system, this paper is based on the Linux Shell language and the Tcl/Tk language, combined with the I of the mainstream Synopsys. C design, implement, verify the in-depth study and understanding of the EDA tools, analyze the key technologies needed to build an efficient IC design platform, and design all the scripts required for the platform. This platform includes the code version control system, the simulation verification script generation process and the logical synthesis script generating program three parts. The code version control system can help IC designers to efficiently manage the version of the code. It is divided into the Linux Shell language design code checking subsystem and the Tcl/Tk designed code detection GUI (Graphical User Interface) subsystem. The simulation verification script generator in the platform is designed by Tcl/ Tk, which can help IC designers to pass simple options Set up, the Makefile script required by the simulation verification tool VCS-MX can be generated. The logical synthesis script generating program in the platform is designed by Tcl/Tk, which can help the IC designers to quickly generate the comprehensive scripts that meet their own design requirements. On the IC design platform designed in this paper, based on the independent standard RFID protocol of China, the design of the chip is implemented. The key technology, including the low power design method, designed for the baseband circuit of the design label chip is analyzed, the Verilog code of the baseband is designed, the function verification before the synthesis is completed, the logic synthesis based on the DesignCompiler, the power analysis based on the PrimeTime PX, is finally based on the FPGA (Field Programmable Gate Array). In the board level system, the joint verification with the reader is implemented. The baseband circuit designed in this paper reduces the power consumption by about 30% compared to the previous generation based on the same protocol without increasing the area, and the protocol consistency test is all passed in the reader and joint verification; the IC design platform built in this paper has been adopted. The design, implementation and verification time of the whole chip are greatly reduced and the efficiency of the project is greatly improved. This also validates the correctness and practicability of the chip design platform built in this paper. The IC design platform built in this paper is also widely used in other laboratory projects and has received good results. If it can be further improved, it can be used in other university laboratories. The label chip designed in this paper has been successfully entered into the flow stage.

【学位授予单位】：西安电子科技大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TP391.44;TN402

【参考文献】