硅基毫米波倍频器和功率放大器的研究

发布时间：2018-06-10 19:14

本文选题：毫米波单片集成电路 + 240GHz倍频器　；参考：《杭州电子科技大学》2017年硕士论文

【摘要】：智能终端的普及和移动数据的快速增长造成了全球性的频谱不足,使得无线服务提供商面临前所未有的挑战。毫米波技术被认为是不断满足消费者对不断增长的无线数据容量需求的关键技术,同时,先进的硅基工艺使得在毫米波波段实现收发机的全集成成为可能。100GHz以上的系统可以应用在通信、遥感、毫米波成像以及行星辐射探测等领域,存在的一个主要挑战是缺少相对便宜的纯净的信号源。目前业界在高频振荡器上已经开展了一些研究,但低频振荡器加倍频器的方案因其具有较好的频率稳定性和相位噪声,仍是一种常用的方法。此外,功率放大器是仅剩的几个未能成功实现集成的电路,它的功能是在信号发射到空气中之前放大信号到所需的功率水平,由于硅基工艺特定的限制,设计高线性度和效率的功率放大器仍是一项挑战性的工作。本论文主要工作是开展240GHz倍频器和140GHz功率放大器的技术研究并完成电路设计。1.介绍了毫米波技术的特点和研究方法,总结了D波段功率放大器和倍频器的技术指标以及拓扑结构。论文介绍了硅基集成电路中的器件和功率放大器的主要技术指标,并对提高功率放大器带宽、增益、输出功率以及线性度和效率的方法进行了详细的阐述。同时,简要介绍了倍频器的主要技术指标以及性能改善技术。2.基于0.13 SiGe BiCMOS工艺完成了240GHz倍频器的设计和仿真。240GHz的倍频器由120GHz的功率放大器和240GHz的二倍频器两个子模块构成。120GHz的功率放大器是由4级共射级结构级联组成的单端功率放大器。仿真结果表明,单端的功率放大器在120GHz处的小信号增益为21.97,3带宽为24GHz(98-122GHz),饱和输出功率为7.04,功率附加效率为7.5%,输出1压缩点为3.87,直流功耗为55.68。二倍频器是经典的push-push结构。仿真结果表明,二倍频器的最大输出功率为3.84,最大增益为-4.76,直流功耗为35。240GHz的倍频器实现了10的功率增益,0的输出功率。3.完成了两款基于65nm CMOS工艺的140GHz功率放大器的设计。第一款功率放大器采用三级全差分结构,前两级为共源结构,最后一级为共源共栅结构。仿真结果表明,该功率放大器在140GHz处的小信号增益为17.5,3带宽为25GHz(130-155GHz),饱和输出功率为7.9,输出1压缩点为5.2,功率附加效率为7.5%,直流功耗为80。第二款功率放大器采用四级全差分结构,四级全为共源结构。仿真结果表明,该功率放大器在140GHz处的小信号增益为16.8,3带宽为17GHz(136-153GHz),饱和输出功率为11.3,输出1压缩点为6.55,功率附加效率为4%,直流功耗为160。提出了两种对功率放大器结构的改进技术,可用于提高功率放大器的增益、输出功率和效率。本论文对于毫米波倍频器和功率放大器的设计方法作了较为详细的分析和总结。基于0.13 SiGe Bi CMOS工艺设计了240GHz倍频器,基于65nm CMOS工艺设计了两款140GHz功率放大器。论文设计的倍频器和功率放大器电路均达到了要求的性能指标。
[Abstract]:The popularity of intelligent terminals and the rapid growth of mobile data have resulted in the global spectrum shortage, which makes wireless service providers face unprecedented challenges. Millimeter wave technology is considered to be the key technology to satisfy consumers' demand for increasing wireless data capacity. In the same time, advanced silicon based technology makes the millimeter wave segment. The full integration of the transceiver has become a possible system that can be applied to communications, remote sensing, millimeter wave imaging and planetary radiation detection. One of the main challenges is the lack of relatively cheap pure signal sources. At present, some research has been carried out on high frequency oscillators in the industry, but the frequency doubling of low frequency oscillators has been carried out in the industry. The scheme is still a common method because of its good frequency stability and phase noise. In addition, the power amplifier is the only one left unsuccessfully integrated circuit, its function is to amplify the signal before the signal is launched into the air to the required level of power, and to design a high line due to the specific limitation of the silicon based process. The power amplifier of sex and efficiency is still a challenging work. The main work of this paper is to carry out the technical research of the 240GHz frequency doubler and the 140GHz power amplifier and complete the circuit design..1. introduces the characteristics and research methods of the millimeter wave technology, and summarizes the technical indexes and topology of the D band power amplifier and frequency doubler. The main technical indexes of devices and power amplifiers in silicon based integrated circuits are introduced, and the methods to improve the bandwidth, gain, output power, linearity and efficiency of the power amplifier are described in detail. At the same time, the main technical standard of the frequency doubler and the performance improvement technology.2. based on 0.13 SiGe BiCMOS are briefly introduced. The process completes the design and Simulation of the 240GHz frequency doubler. The frequency doubler of.240GHz consists of a 120GHz power amplifier and two sub modules of the two frequency doubler of 240GHz. The power amplifier of the.120GHz is a single end power amplifier composed of cascade 4 common fire stage structures. The simulation results show that the single end power amplifier is small signal gain at 120GHz With the 21.97,3 bandwidth of 24GHz (98-122GHz), the saturation output power is 7.04, the power added efficiency is 7.5%, the output 1 compression point is 3.87, the DC power consumption is 55.68. two frequency doubler is the classic push-push structure. The simulation results show that the maximum output power of the two frequency doubler is 3.84, the maximum gain is -4.76, the DC power consumption of 35.240GHz doubler is realized. 10 power gain, 0 output power.3. completed the design of two 140GHz power amplifiers based on the 65nm CMOS process. The first power amplifier uses a three stage full differential structure, the first two is the common source structure and the last stage is a common source common grid structure. The simulation results show that the small signal gain of the power amplifier at 140GHz is 17.5,3 band. The width is 25GHz (130-155GHz), the saturation output power is 7.9, the output 1 compression point is 5.2, the power added efficiency is 7.5%, the DC power consumption is 80. second power amplifiers with four full differential structure, and the four level is all common source. The simulation results show that the small signal gain of the power amplifier at 140GHz is 17GHz (136-153GHz), and is full of 17GHz (136-153GHz). The output power is 11.3, the output 1 compression point is 6.55, the power added efficiency is 4%, the DC power is 160., and two kinds of improved power amplifier structure are proposed, which can be used to improve the gain, output power and efficiency of the power amplifier. Analysis and summary. Based on 0.13 SiGe Bi CMOS process, the 240GHz frequency doubler is designed, and two 140GHz power amplifiers are designed based on 65nm CMOS process. The frequency doubler and power amplifier circuit designed in this paper have achieved the required performance indicators.
【学位授予单位】：杭州电子科技大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN722.75;TN771

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