现场总线MAU芯片中的接收电路的设计与研究

发布时间：2018-06-28 13:26

本文选题：现场总线 + 介质结合单元　；参考：《沈阳工业大学》2015年硕士论文

【摘要】：介质结合单元（MAU）是总线供电的现场总线仪表中的接口电路，用于实现标准逻辑信号与传输介质上的物理信号之间的转换。MAU芯片是实现上述功能的大规模混合信号集成电路，目前只有少数国外公司可提供。MAU芯片的设计技术是现场总线仪表的核心技术之一，随着现场总线技术的广泛应用，MAU芯片的研制具有越来越重要的意义。本文介绍了一种基于国内工艺设计的MAU芯片，并重点讨论了其中接收电路的设计和实现方法。设计采用了逆向与正向相结合的方法，首先对一种国外芯片进行了逆向分析，结合现场总线通信协议IEC61158-2中对信号传输质量的要求，确定了电路结构和各种性能指标，然后基于国内工艺完成了设计。接收电路由开关电容滤波器和比较器两个部分组成，主要功能是从总线上接收频率范围在7.8KHz-39KHz之间的信号并将其转换为内部数字电路所能识别的逻辑信号，同时抑制频带外的干扰及噪声。课题的技术难点在于将芯片原有的工艺替换为新工艺，需要对开关电容网络的Z变换传输函数和比较器比较点的偏置电压进行调整。另外原芯片的接收范围为1KHz-44.3KHz，本文通过对电路的电容比进行优化使接收范围达到7.8KHz-40KHz，更加接近通信协议的要求。首先使用Chiplogic Analyzer软件提取电路、然后使用Cadence软件整理功能模块，，对各个模块的功能进行分析，包括开关电容滤波器、比较器、运算放大器、偏置电路以及不交叠时钟电路。开关电容滤波器是整个电路的关键部分，所以对于这部分进行了重点分析。在对整个电路分析之后，采用华虹NEC0.35um BCD工艺对电路进行工艺移植。利用仿真工具，对接收电路各个模块以及整体功能进行仿真分析，结果达到现场总线通信协议IEC61158-2标准对接收电路的要求。最后完成电路的版图设计并通过了DRC和LVS。
[Abstract]:The dielectric binding unit (mau) is the interface circuit in the fieldbus instrument which is powered by the bus. It is used to realize the conversion between the standard logic signal and the physical signal on the transmission medium. The mau chip is a large-scale mixed signal integrated circuit to realize the above functions. At present, only a few foreign companies can provide the design technology of .mau chip is one of the core technologies of fieldbus instrument. With the wide application of fieldbus technology, the development of mau chip is becoming more and more important. In this paper, a mau chip based on domestic process design is introduced, and the design and implementation of the receiving circuit are discussed in detail. The design adopts the method of combining reverse and forward. Firstly, the reverse analysis of a kind of foreign chip is carried out. According to the requirement of signal transmission quality in fieldbus communication protocol IEC61158-2, the circuit structure and various performance indexes are determined. Then the design is completed based on the domestic process. The receiving circuit consists of a switched capacitor filter and a comparator. The main function of the circuit is to receive the signal with the frequency range of 7.8 KHz-39KHz from the bus and convert it into a logical signal that can be recognized by the internal digital circuit. At the same time, the interference and noise outside the frequency band are suppressed. The technical difficulty lies in replacing the original process of the chip with the new process. It is necessary to adjust the Z transform transfer function of the switched capacitor network and the bias voltage of the comparator. In addition, the receiving range of the original chip is 1KHz-44.3KHz. by optimizing the capacitance ratio of the circuit, the receiving range reaches 7.8 KHz-40KHz, which is closer to the requirement of the communication protocol. Firstly, the circuit is extracted by Chiplogic Analyzer software, and then the function of each module is analyzed, including switched capacitor filter, comparator, operational amplifier, bias circuit and non-overlapping clock circuit. Switched-capacitor filter is the key part of the whole circuit, so this part is analyzed emphatically. After analyzing the whole circuit, the circuit is transplanted by Huahong NEC 0.35um BCD process. By using the simulation tool, each module and the whole function of the receiving circuit are simulated and analyzed. The results meet the requirements of the field bus communication protocol IEC61158-2 for the receiving circuit. Finally, the layout of the circuit is designed and passed through DRC and LVS.
【学位授予单位】：沈阳工业大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN402

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