宽电压SoC的自适应电压频率调节系统设计

发布时间：2018-07-08 14:09

  本文选题：宽电压 + PVT偏差　； 参考：《东南大学》2015年硕士论文

【摘要】：随着集成电路技术的飞速发展,宽电压电路由于能够兼顾性能和能效两大需求,受到广泛关注。然而如何能够在常规电压区获得高性能的同时尽量降低功耗,并且在低电压近阈值区抑制PVT偏差的剧烈影响实现高能效成为了宽电压设计的瓶颈。自适应电压频率调节(Adaptive Voltage Frequency Scaling, AVFS)技术可以利用片上监控单元监测关键路径时序,并实时调节芯片的电压、频率,成为攻克宽电压设计瓶颈的有力手段。考虑到宽电压、先进工艺下局部PVT偏差严重,综合对比常用AVFS设计方法,本文主要研究在线监测中预测型的AVFS技术。首先设计了一款延时可配的在线监控单元以及一套静态时序分析同动态时序仿真相结合的监控点选取方法,并给出了在已完成流片的芯片上的实际应用效果：随后,设计了AVFS控制模块和以Cortex-M3为核心的小型SoC验证电路,使用SMIC 40nm工艺完成了包括版图在内的前后端设计,其中AVFS部分引入了4.7%的面积开销；最后设计了HSIM-VCS混合仿真平台,对整个设计进行仿真验证。仿真结果表明,在常规电压(1.1V)区,根据工艺角和温度的不同,最好情况即FF工艺角、-25℃时有54.3%的功耗收益,即使最坏情况即SS工艺角、125℃也有28.5%的功耗收益：在低电压近闽值(0.6V)区,有效抑制PVT偏差对电路的影响之外,最高有73.2%的功耗收益。能效角度来看,开启AVFS功能后,低电压区较常规电压区能效提高到3倍以上。对比国内外相关研究,本文的宽电压AVFS设计在有效抑制PVT偏差之外可以获得显著的功耗、能效收益。
[Abstract]:With the rapid development of integrated circuit (IC) technology, wide voltage circuits (WVCs) have attracted wide attention due to their ability to meet the requirements of both performance and energy efficiency. However, how to achieve high performance in conventional voltage range and reduce power consumption, and how to reduce the severe impact of PVT deviation in low voltage near threshold region and achieve high energy efficiency has become the bottleneck of wide voltage design. Adaptive Voltage Frequency scaling (Adaptive) technology can use on-chip monitoring unit to monitor critical path timing, and adjust the voltage and frequency of the chip in real time, which becomes a powerful means to overcome the bottleneck of wide voltage design. Considering the wide voltage and the serious local PVT deviation under advanced technology, this paper mainly studies the predictive AVFS technology in on-line monitoring, which is compared with the commonly used AVFS design methods. First of all, a delay and configurable on-line monitoring unit and a set of monitoring points selection method combining static timing analysis with dynamic timing simulation are designed, and the practical application results on the chip of the completed stream chip are given. The control module of AVFS and the verification circuit based on Cortex-M3 are designed. The design of front and rear end, including layout, is completed by using SMIC 40nm process, in which the area overhead is 4.7%. Finally, the hybrid simulation platform of HSIM-VCS is designed. The whole design is simulated and verified. The simulation results show that in the conventional voltage (1.1 V) region, according to the process angle and temperature, the best case is that the FF process angle at 25 鈩，

本文编号：2107691