基于FPGA的多模多通道相参信号源设计

发布时间：2018-07-09 22:04

本文选题：FPGA + DDS　；参考：《电子科技大学》2017年硕士论文

【摘要】：针对现有通用信号源功能不能满足专用设备的测试需求,本文设计了一种基于FPGA和高速DAC技术相结合的多模多通道相参信号源的方法。该信号源充分利用低成本、高性能的FPGA逻辑资源丰富、速度快、可用管脚多、DDS IPCORE精度高以及可编程并行处理等特点,产生多通道任意波形且相位可控的中射频信号,并通过高速DAC实现数模转换。同时,利用带有第二奈奎斯特区输出功能的高速DAC,如AD9119/AD9129,实现超奈奎斯特输出,用于产生输出频率更高的更高的信号。本文的主要工作如下:介绍了FPGA产生多模式信号的设计结构。为解决DAC转换速率远高于现有FPGA器件的工作时钟的问题,详细介绍了一种并行DDS信号产生方式。根据DAC的转换速率,设计了并行信号产生过程中所需要的并行通道数量,然后基于FPGA的硬件资源与实现方法,详细设计了各模式信号产生的结构,最后利用Verilog HDL语言对信号产生结构进行编程与仿真分析,用于验证编写的Verilog HDL语言程序的正确性。介绍了多模多通道相参信号源的硬件设计平台。根据多模多通道相参信号源的技术指标要求,详细介绍了一种基于FPGA、高速DAC、两级同步相位校正的硬件电路的设计方案,并详细介绍了两级多通道相位同步的设计方法与实现方式。并根据DAC的特性参数以及奈奎斯特第一区、第二区及第三区的输出频率响应特性,通过切换DAC工作时钟,扩展了输出信号频率范围,避免了输出信号频率在0.5倍采样率、1倍采样率及1.5倍采样率附近时,输出功率较小的现象。测试了多模多通道相参信号源的输出。根据多模信号的数学原理及仿真分析结果、多模信号的产生方法,在硬件平台上分别测试了多模信号的输出频谱,以及多通道同步信号的输出时域波形,测试结果与理论分析一致,从而验证了设计方法的可行性与正确性。综上所述,本文设计的基于FPGA和高速DAC技术相结合的多模多通道相参信号源具有一定的可行性与使用价值。
[Abstract]:In view of the fact that the existing universal signal source function can not meet the test requirements of special equipment, this paper designs a method of multi-mode multi-channel coherent signal source based on FPGA and high-speed DAC technology. This signal source makes full use of the advantages of low cost, high performance FPGA logic resources, high speed, high precision of multi-pin DDS IPCORE and programmable parallel processing, so it can produce multi-channel arbitrary waveform and controllable phase middle frequency signal. Digital to analog conversion is realized by high speed DAC. At the same time, using the high speed DAC with the output function of the second Nyquist region, such as AD9119 / AD9129, the ultra-Nyquist output is realized, which is used to generate higher frequency signals. The main work of this paper is as follows: the design structure of multi-mode signal generated by FPGA is introduced. In order to solve the problem that DAC conversion rate is much higher than the working clock of existing FPGA devices, a parallel DDS signal generation method is introduced in detail. According to the conversion rate of DAC, the number of parallel channels needed in the process of parallel signal generation is designed. Then, based on the hardware resources and implementation method of FPGA, the structure of each mode signal generation is designed in detail. Finally, the signal generation structure is programmed and simulated with Verilog HDL, which is used to verify the correctness of the program written in Verilog HDL. The hardware design platform of multi-mode multi-channel coherent signal source is introduced. According to the technical requirements of multi-mode and multi-channel coherent signal source, a hardware circuit based on FPGA, high speed DAC and two-stage synchronous phase correction is introduced in detail. The design and implementation of two-stage multi-channel phase synchronization are introduced in detail. According to the characteristic parameters of DAC and the output frequency response characteristics of the first, second and third regions of Nyquist, the output frequency range is extended by switching the clock of DAC. It avoids the phenomenon that the output power is smaller when the output signal frequency is near the sampling rate of one or five times the sampling rate of 0.5 times and the sampling rate of 1.5 times. The output of multi-mode multi-channel coherent signal source is tested. According to the mathematical principle of multi-mode signal and the result of simulation analysis, the output spectrum of multi-mode signal and the output time-domain waveform of multi-channel synchronous signal are tested on the hardware platform. The test results are consistent with the theoretical analysis, which verifies the feasibility and correctness of the design method. To sum up, the multi-mode multi-channel coherent signal source based on FPGA and high-speed DAC technology is feasible and valuable.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN791

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