并行FIR滤波器系数设计及结构优化
发布时间：2018-08-06 13:35
【摘要】：FIR数字滤波器是数字信号处理系统中的核心部件,因为具有良好的线性相位特性而在数字通信图像处理等领域得到广泛应用。FIR滤波器的设计主要可以分为系数设计和结构设计两个方面。本文从上述两方面进行了 FIR数字低通滤波器的设计工作。FIR滤波器系数设计问题可以抽象成数学领域中的多维连续函数求最优解的问题,所以可以采用遗传算法进行求解。针对传统遗传算法存在的容易早熟收敛的问题,本文提出了一种新的改进策略,从交叉变异的概率和算子两方面对算法进行改进,通过测试函数验证了改进策略的可行性,并分别在最小二乘准则,最大误差最小化准则和均方误差最小化准则下对FIR滤波器进行设计。具体地,采用改进算法在最小二乘准则下设计的40阶FIR滤波器的最小阻带衰减为39.65dB,而采用蚂蚁算法的设计结果为36.85dB,滤波性能提高了 7.6%。传统的滤波器并行结构中硬件消耗随并行度线性增加。本文首先采用快速卷积算法减少滤波器并行结构中子滤波器的数量,在低并行度滤波器的实现过程中通过采用更多具有对称系数的子滤波器来减少电路中的乘法器数量,同时将改进的低并行度滤波器通过迭代的方式得到高并行度的FIR数字滤波器。通过改进的2并行结构和3并行结构迭代得到的72抽头的6并行滤波器需要168个乘法器,与ISCA结构相比少用了 12个乘法器,表明改进结构可以有效减小并行结构的硬件消耗。
[Abstract]:FIR digital filter is the core component of digital signal processing system. The design of Fir filter can be divided into two aspects: coefficient design and structure design because of its good linear phase characteristics and widely used in digital communication image processing and other fields. In this paper, the design work of FIR digital low-pass filter is carried out. The problem of Fir filter coefficient design can be abstracted into the problem of multi-dimensional continuous function in mathematics to find the optimal solution, so genetic algorithm can be used to solve the problem. Aiming at the problem of premature convergence of traditional genetic algorithm, this paper proposes a new improved strategy, which improves the algorithm from the probability of crossover mutation and operator, and verifies the feasibility of the improved strategy by testing function. The FIR filter is designed under the least square criterion, the maximum error minimization criterion and the mean square error minimization criterion respectively. Specifically, the minimum stopband attenuation of the 40 order FIR filter designed by the improved algorithm under the least square criterion is 39.65 dB, while the design result of the ant algorithm is 36.85 dB, the filtering performance is improved by 7.6 dB. The hardware consumption increases linearly with the degree of parallelism in the traditional filter parallel structure. In this paper, the fast convolution algorithm is used to reduce the number of filters with parallel structure, and the number of multipliers in the circuits is reduced by using more sub-filters with symmetric coefficients in the implementation of low parallelism filters. At the same time, the improved low parallelism filter is iterated to obtain the high parallelism FIR digital filter. The improved 2 parallel structure and 3 parallel structure iterative method for 72 tap 6 parallel filters require 168 multipliers, which are less than 12 multipliers compared with the ISCA structure. It shows that the improved structure can effectively reduce the hardware consumption of the parallel structure.
【学位授予单位】：浙江大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN713.7
本文编号：2167894
[Abstract]:FIR digital filter is the core component of digital signal processing system. The design of Fir filter can be divided into two aspects: coefficient design and structure design because of its good linear phase characteristics and widely used in digital communication image processing and other fields. In this paper, the design work of FIR digital low-pass filter is carried out. The problem of Fir filter coefficient design can be abstracted into the problem of multi-dimensional continuous function in mathematics to find the optimal solution, so genetic algorithm can be used to solve the problem. Aiming at the problem of premature convergence of traditional genetic algorithm, this paper proposes a new improved strategy, which improves the algorithm from the probability of crossover mutation and operator, and verifies the feasibility of the improved strategy by testing function. The FIR filter is designed under the least square criterion, the maximum error minimization criterion and the mean square error minimization criterion respectively. Specifically, the minimum stopband attenuation of the 40 order FIR filter designed by the improved algorithm under the least square criterion is 39.65 dB, while the design result of the ant algorithm is 36.85 dB, the filtering performance is improved by 7.6 dB. The hardware consumption increases linearly with the degree of parallelism in the traditional filter parallel structure. In this paper, the fast convolution algorithm is used to reduce the number of filters with parallel structure, and the number of multipliers in the circuits is reduced by using more sub-filters with symmetric coefficients in the implementation of low parallelism filters. At the same time, the improved low parallelism filter is iterated to obtain the high parallelism FIR digital filter. The improved 2 parallel structure and 3 parallel structure iterative method for 72 tap 6 parallel filters require 168 multipliers, which are less than 12 multipliers compared with the ISCA structure. It shows that the improved structure can effectively reduce the hardware consumption of the parallel structure.
【学位授予单位】：浙江大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN713.7
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