寄生电感对SiC MOSFET开关特性的影响
发布时间：2018-08-09 19:24
【摘要】：随着开关频率的增大,寄生电感对碳化硅(SiC)器件动态开关过程的影响程度也越来越大,无法充分发挥其高速开关下低开关损耗的性能优势。本文采用理论定性分析与实验定量研究相结合的方法,考虑相关寄生电感,对SiC MOSFET基本开关电路建立数学模型,确立影响开关特性的主要因素,然后通过SiC器件高速电路双脉冲测试平台,对各部分寄生电感对SiC器件开关性能的影响进行系统研究,揭示寄生电感对SiC MOSFET开关特性的影响规律。在此基础之上,根据SiC高速开关电路实际布局的限制,在布局紧凑程度或回路走线总长度相对不变的情况下,对各部分寄生电感的匹配关系进行研究,归纳出SiC器件开关过程受寄生参数影响的特性规律,从而指导SiC基高速开关电路的优化布局设计。
[Abstract]:With the increase of switching frequency, the parasitic inductance has more and more influence on the dynamic switching process of silicon carbide (SiC) devices, which can not give full play to its performance advantage of low switching loss at high speed switch. In this paper, a mathematical model of the basic switching circuit of SiC MOSFET is established by combining theoretical qualitative analysis with quantitative experimental study and considering the parasitic inductance, and the main factors affecting the switching characteristics are established. Then the influence of parasitic inductors on the switching performance of SiC devices is studied systematically on the basis of the dual-pulse test platform for high-speed circuits of SiC devices. The influence of parasitic inductors on the characteristics of SiC MOSFET switches is revealed. On this basis, according to the limitation of SiC high speed switch circuit layout, the matching relation of parasitic inductance of each part is studied under the condition that the layout is compact or the total length of circuit line is relatively constant. The characteristics of SiC switch process affected by parasitic parameters are summarized, which can guide the optimal layout design of SiC based high speed switch circuits.
【作者单位】： 南京航空航天大学多电飞机电气系统工业和信息化部重点实验室;河海大学江苏省输配电装备技术重点实验室;
【基金】：国家自然科学基金(51677089)资助项目 中央高校基本科研业务费专项资金(NS2015039,NS20160047)资助项目 江苏省普通高校研究生科研创新计划(SJLX16_0107)资助项目
【分类号】：TN386
[Abstract]:With the increase of switching frequency, the parasitic inductance has more and more influence on the dynamic switching process of silicon carbide (SiC) devices, which can not give full play to its performance advantage of low switching loss at high speed switch. In this paper, a mathematical model of the basic switching circuit of SiC MOSFET is established by combining theoretical qualitative analysis with quantitative experimental study and considering the parasitic inductance, and the main factors affecting the switching characteristics are established. Then the influence of parasitic inductors on the switching performance of SiC devices is studied systematically on the basis of the dual-pulse test platform for high-speed circuits of SiC devices. The influence of parasitic inductors on the characteristics of SiC MOSFET switches is revealed. On this basis, according to the limitation of SiC high speed switch circuit layout, the matching relation of parasitic inductance of each part is studied under the condition that the layout is compact or the total length of circuit line is relatively constant. The characteristics of SiC switch process affected by parasitic parameters are summarized, which can guide the optimal layout design of SiC based high speed switch circuits.
【作者单位】： 南京航空航天大学多电飞机电气系统工业和信息化部重点实验室;河海大学江苏省输配电装备技术重点实验室;
【基金】：国家自然科学基金(51677089)资助项目 中央高校基本科研业务费专项资金(NS2015039,NS20160047)资助项目 江苏省普通高校研究生科研创新计划(SJLX16_0107)资助项目
【分类号】：TN386
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