二维半导体器件电子输运性质研究
发布时间：2018-08-21 13:05
【摘要】：自2004年石墨烯被发现以来,由于其极为独特的电子与光电子特性,二维材料在未来器件中的应用得到了学术界广泛关注。过渡金属硫化物(TMDC)是石墨烯之外最受关注的一类二维材料,其强的面内共价键以及比较弱的层间相互作用使其极易通过剥离的方法得到单层样品。尽管TMDC的研究已有几十年的历史,近年来对低维材料的表征以及器件加工工艺的发展,其在器件应用领域有了很多新的发展机会。二硫化钼(MoS2)和二硫化钨(WS2)是典型的宽禁带(单层样品禁带宽度分别为1.8eV和2.0 eV)二维半导体型TMDC,在器件应用上,具备低静态能耗,高开关比,高迁移的优良性能,二维的晶体结构可以有效一直随器件尺寸降低带来的短沟道效应,同时其器件加工工艺与传统硅基材料保证高度兼容性,被视为后硅时代集成电路极具潜力的材料。迁移率一直被视为判断器件性能的重要指标之一,通过理论计算,单层MoS2室温声子极限迁移率可达到410cm2/Vs,而WS2理论电子迁移率则超过1000cm2/Vs,而在此之前实验得到的最高迁移率仅为40～50cm2/Vs,远远低于其理论值；研究组前期工作中在对材料进行表征时发现天然MoS2存在大量的原子缺陷,缺陷严重制约了器件性能的提高；同时对于材料输运机制的研究也没能完全解释实验上所观察到的现象,比如金属到绝缘体转变(MIT, Metal to insulating transition),基于以上分析,我们开展了一系列关于MoS2和WS2缺陷修复的背栅极场效应晶体管电子输运的研究,主要研究内容如下：(1)采用硫醇化学方法对MoS2表面的S原子缺陷进行修复,通过对比前后高分辨透射电子显微镜(HR-TEM, High resolution transmission electron microscopy)图片统计分析发现硫醇可以有效修复MoS2表面的S空位缺陷。我们分别对未处理-单面修复-双面修复的三种MoS2样品制备了背栅器件,研究缺陷修复对电子输运的影响。双面修复样品室温迁移率达到80Vs,为目前报道的最高记录。通过对三种不同器件的变温输运数据进行拟合分析,发现MoS2输运中MIT现象主要是缺陷引入的局域态所导致的。通过进一步的理论分析,我们搭建了一套完整的理论模型,考虑了样品内存在的多种散射机制(声子,带电杂质,短程散射)以及局域态对电子的束缚,该模型可以定量的计算分析器件迁移率,电导率随温度的变化趋势,并可以给出MIT的微观物理意义。(2)通过原子层沉积技术(ALD, Atomic Layer Deposition)在氧化硅表面沉积～10nm高介电常数的Al203,我们在沉积的高K值的氧化物表面制备WS2器件,发现相比氧化硅表面,局域化电子明显减少,器件在高载流子浓度时表现出明显的金属性传输。室温下,器件迁移率相比氧化硅表面提高100%,低温下迁移率达到氧化硅衬底器件100倍以上。通过采用和MoS2相似的理论模型进行拟合分析,我们发现WS2的性能提高主要来自高质量的high-κ界面上电子陷阱(trap)浓度的减少。为了进一步提高器件性能,我们结合了硫醇化学修饰的方法,进一步降低器件的trap浓度,得到了室温和低温迁移率均明显高于已有报道的结果,为当前迁移率记录。
[Abstract]:Since the discovery of graphene in 2004, due to its unique electronic and optoelectronic properties, the application of two-dimensional materials in future devices has attracted wide attention in academia. Although TMDC has been studied for decades, the characterization of low-dimensional materials and the development of device fabrication technology in recent years have provided many new opportunities for development in device applications. Molybdenum disulfide (MoS2) and tungsten disulfide (WS2) are typical wide band gaps. Two-dimensional (1.8eV and 2.0eV) semiconductor TMDC have the advantages of low static energy consumption, high switching ratio and high mobility in device applications. Two-dimensional (2-D) crystal structure can effectively reduce the short channel effect caused by the decrease of device size. At the same time, its device fabrication process ensures high compatibility with traditional silicon-based materials, which is regarded as the post-silicon era. Mobility has always been regarded as one of the most important parameters to judge the performance of integrated circuits. Theoretical calculations show that the phonon limiting mobility of single-layer MoS2 can reach 410 cm 2/Vs at room temperature, whereas the theoretical electron mobility of WS2 exceeds 1000 cm 2/Vs. The highest mobility of the previous experiments is only 40-50 cm 2/Vs, which is much lower than that of the previous experiments. In the previous work of the research group, a large number of atomic defects were found in natural MoS2, which severely restricted the improvement of device performance. At the same time, the study of material transport mechanism could not fully explain the observed phenomena, such as metal to insulator transition (MIT, Metal to insulati). Based on the above analysis, we have carried out a series of studies on electron transport in MoS2 and WS2 defect-repaired back-gate field effect transistors. The main research contents are as follows: (1) Mercaptan chemical method was used to repair S atom defect on MoS2 surface, and high-resolution transmission electron microscopy (HR-TEM, High res) was compared before and after repair. Statistical analysis of the images shows that mercaptan can effectively repair S-vacancy defects on the surface of MoS2. We fabricated three kinds of MoS2 samples, untreated-unilateral-bilateral, to study the effect of defect repair on electron transport. By fitting and analyzing the temperature-dependent transport data of three different devices, it is found that the MIT phenomenon in MoS2 transport is mainly caused by the local state introduced by the defect. The model can quantitatively calculate and analyze the mobility of the device, the variation of the conductivity with temperature, and give the micro-physical meaning of MIT. (2) Al203 with high dielectric constant of 10 nm was deposited on the surface of silicon oxide by atomic layer deposition (ALD). WS2 devices were fabricated on the deposited oxide surfaces with high K values. The localized electrons were significantly reduced compared with the silicon oxide surfaces, and the devices exhibited significant metal transport at high carrier concentrations. We found that the performance improvement of WS2 was mainly due to the reduction of trap concentration at the High-kappa interface. In order to further improve the device performance, we combined mercaptan chemical modification method to further reduce trap concentration, and obtained room temperature and low temperature transition. The mobility rate was significantly higher than the reported results.
【学位授予单位】：南京大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN303
本文编号：2195822
[Abstract]:Since the discovery of graphene in 2004, due to its unique electronic and optoelectronic properties, the application of two-dimensional materials in future devices has attracted wide attention in academia. Although TMDC has been studied for decades, the characterization of low-dimensional materials and the development of device fabrication technology in recent years have provided many new opportunities for development in device applications. Molybdenum disulfide (MoS2) and tungsten disulfide (WS2) are typical wide band gaps. Two-dimensional (1.8eV and 2.0eV) semiconductor TMDC have the advantages of low static energy consumption, high switching ratio and high mobility in device applications. Two-dimensional (2-D) crystal structure can effectively reduce the short channel effect caused by the decrease of device size. At the same time, its device fabrication process ensures high compatibility with traditional silicon-based materials, which is regarded as the post-silicon era. Mobility has always been regarded as one of the most important parameters to judge the performance of integrated circuits. Theoretical calculations show that the phonon limiting mobility of single-layer MoS2 can reach 410 cm 2/Vs at room temperature, whereas the theoretical electron mobility of WS2 exceeds 1000 cm 2/Vs. The highest mobility of the previous experiments is only 40-50 cm 2/Vs, which is much lower than that of the previous experiments. In the previous work of the research group, a large number of atomic defects were found in natural MoS2, which severely restricted the improvement of device performance. At the same time, the study of material transport mechanism could not fully explain the observed phenomena, such as metal to insulator transition (MIT, Metal to insulati). Based on the above analysis, we have carried out a series of studies on electron transport in MoS2 and WS2 defect-repaired back-gate field effect transistors. The main research contents are as follows: (1) Mercaptan chemical method was used to repair S atom defect on MoS2 surface, and high-resolution transmission electron microscopy (HR-TEM, High res) was compared before and after repair. Statistical analysis of the images shows that mercaptan can effectively repair S-vacancy defects on the surface of MoS2. We fabricated three kinds of MoS2 samples, untreated-unilateral-bilateral, to study the effect of defect repair on electron transport. By fitting and analyzing the temperature-dependent transport data of three different devices, it is found that the MIT phenomenon in MoS2 transport is mainly caused by the local state introduced by the defect. The model can quantitatively calculate and analyze the mobility of the device, the variation of the conductivity with temperature, and give the micro-physical meaning of MIT. (2) Al203 with high dielectric constant of 10 nm was deposited on the surface of silicon oxide by atomic layer deposition (ALD). WS2 devices were fabricated on the deposited oxide surfaces with high K values. The localized electrons were significantly reduced compared with the silicon oxide surfaces, and the devices exhibited significant metal transport at high carrier concentrations. We found that the performance improvement of WS2 was mainly due to the reduction of trap concentration at the High-kappa interface. In order to further improve the device performance, we combined mercaptan chemical modification method to further reduce trap concentration, and obtained room temperature and low temperature transition. The mobility rate was significantly higher than the reported results.
【学位授予单位】：南京大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN303
【共引文献】
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