槽栅型二维类超结LDMOS研究
发布时间：2018-09-03 06:02
【摘要】：本文介绍了横向双扩散金属氧化物半导体场效应晶体管(Lateral Double-diffused Metal Oxide Semiconductor Field Effect Transistor,LDMOS)的基本结构,对其耐压特性、导通特性、优点和应用进行了简要分析。并对业界用以改善漂移区的终端技术进行了较为详细的归纳和总结,重点对降低表面电场(Reduced SURface Field,RESURF)机理、超结技术和槽型结构的引入做了详细介绍。接下来从结构角度出发,通过对器件的重新设计,研究了三种新型二维类超结LDMOS结构。采用MEDICI(二维器件仿真软件)对所提出的器件进行仿真研究和参数优化调整,从而在提升器件击穿电压的同时降低比导通电阻。槽栅型二维类超结LDMOS:将纵向交替掺杂的P/N柱应用于槽栅型LDMOS中,并将漏极重掺杂N+区纵向延伸至与N型柱区相接。器件处于反向耐压状态时,P柱区和N柱区分别处于低电位状态和高电位状态,从而使得漂移区更好耗尽。基于功率半导体物理知识和仿真结果,对该结构导通时的I-V特性和关断状态下的耐高压能力进行了分析。最终得出500V的击穿电压,较普通结构得到了32.6%的优化,并且比导通电阻降低了62.5%。槽栅型阶梯掺杂P柱区二维类超结LDMOS:在常规结构的基础上,从漂移区掺杂浓度方面进行优化,将横向变掺杂技术引入到P柱区的设计中,从源端至漏端掺杂浓度逐渐变低。一方面,在两个结P1/P2和P2/P3的界面处引入了新的电场峰值对漂移区电场进行优化;另一方面,这样的柱区掺杂方式对衬底辅助耗尽效应(Substrate Assisted Depletion Effect,SAD)所带来的电荷不平衡问题起到了有效的缓解作用。最终将击穿电压调整至814V,并且得到的比导通电阻为0.19Ω·cm2。槽型二维类超结LDMOS:在常规结构的基础上,从漂移区形状方面进行优化,在漂移区中引入槽。一方面,引入的槽对漂移区进行了折叠,使得其实际长度较横向尺寸大;另一方面,槽内填充的介质介电常数比较小,耐压性能较硅高;再者,同等耐压级别下器件的漂移区可以做的更短,因而比导通电阻减小。在漂移区长度35μm时,得到了与阶梯掺杂P柱区结构在50μm漂移区下的同等耐压水平。
[Abstract]:In this paper, the basic structure of transverse double diffusion metal oxide semiconductor field effect transistor (Lateral Double-diffused Metal Oxide Semiconductor Field Effect Transistor,LDMOS) is introduced. The characteristics of voltage resistance, conduction, advantages and applications are briefly analyzed. The terminal technology used to improve the drift zone is summarized in detail. The mechanism of reducing surface electric field (Reduced SURface Field,RESURF), the technology of overjunction and the introduction of slot structure are introduced in detail. Then, from the point of view of structure, through the redesign of the device, three new two-dimensional superjunction LDMOS structures are studied. The MEDICI (two-dimensional device simulation software) is used to simulate and adjust the parameters of the proposed devices so as to reduce the specific on-resistance while increasing the breakdown voltage of the devices. Two-dimensional groove-gate superjunction (LDMOS:) is applied to the groove-gate LDMOS with alternating longitudinal P / N columns, and the drain heavily doped N region is extended longitudinally to the N-type column region. When the device is in the reverse voltage state, the P column region and the N column region are in the low potential state and the high potential state respectively, which makes the drift region more depleted. Based on the knowledge of power semiconductor physics and simulation results, the I-V characteristics of the structure and the high pressure resistance under turn-off state are analyzed. Finally, the breakdown voltage of 500V is optimized by 32.6% compared with the common structure, and the on resistance is reduced by 62.5%. Based on the conventional structure of groove-gate step doped P-column LDMOS:, the doping concentration in drift region is optimized. The transverse variable doping technique is introduced into the design of P-column region, and the doping concentration decreases gradually from source end to drain end. On the one hand, a new peak value of electric field is introduced at the interface of two junctions P1/P2 and P2/P3 to optimize the electric field in the drift region, on the other hand, The columnar doping can effectively alleviate the charge imbalance caused by the substrate-assisted depletion effect (Substrate Assisted Depletion Effect,SAD). The breakdown voltage is adjusted to 814V and the specific on-resistance is 0.19 惟 cm2.. Based on the conventional structure, the groove-type two-dimensional superjunction LDMOS: is optimized from the shape of the drift region, and the slot is introduced into the drift region. On the one hand, the introduced slot folds the drift zone, which makes the actual length larger than the transverse size; on the other hand, the dielectric constant is smaller and the voltage resistance is higher than that of silicon. At the same voltage level, the drift region of the device can be shorter, thus reducing the on-resistance. When the length of drift region is 35 渭 m, the same voltage level as that of step doped P column structure in 50 渭 m drift region is obtained.
【学位授予单位】：南京邮电大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN386
本文编号：2219052
[Abstract]:In this paper, the basic structure of transverse double diffusion metal oxide semiconductor field effect transistor (Lateral Double-diffused Metal Oxide Semiconductor Field Effect Transistor,LDMOS) is introduced. The characteristics of voltage resistance, conduction, advantages and applications are briefly analyzed. The terminal technology used to improve the drift zone is summarized in detail. The mechanism of reducing surface electric field (Reduced SURface Field,RESURF), the technology of overjunction and the introduction of slot structure are introduced in detail. Then, from the point of view of structure, through the redesign of the device, three new two-dimensional superjunction LDMOS structures are studied. The MEDICI (two-dimensional device simulation software) is used to simulate and adjust the parameters of the proposed devices so as to reduce the specific on-resistance while increasing the breakdown voltage of the devices. Two-dimensional groove-gate superjunction (LDMOS:) is applied to the groove-gate LDMOS with alternating longitudinal P / N columns, and the drain heavily doped N region is extended longitudinally to the N-type column region. When the device is in the reverse voltage state, the P column region and the N column region are in the low potential state and the high potential state respectively, which makes the drift region more depleted. Based on the knowledge of power semiconductor physics and simulation results, the I-V characteristics of the structure and the high pressure resistance under turn-off state are analyzed. Finally, the breakdown voltage of 500V is optimized by 32.6% compared with the common structure, and the on resistance is reduced by 62.5%. Based on the conventional structure of groove-gate step doped P-column LDMOS:, the doping concentration in drift region is optimized. The transverse variable doping technique is introduced into the design of P-column region, and the doping concentration decreases gradually from source end to drain end. On the one hand, a new peak value of electric field is introduced at the interface of two junctions P1/P2 and P2/P3 to optimize the electric field in the drift region, on the other hand, The columnar doping can effectively alleviate the charge imbalance caused by the substrate-assisted depletion effect (Substrate Assisted Depletion Effect,SAD). The breakdown voltage is adjusted to 814V and the specific on-resistance is 0.19 惟 cm2.. Based on the conventional structure, the groove-type two-dimensional superjunction LDMOS: is optimized from the shape of the drift region, and the slot is introduced into the drift region. On the one hand, the introduced slot folds the drift zone, which makes the actual length larger than the transverse size; on the other hand, the dielectric constant is smaller and the voltage resistance is higher than that of silicon. At the same voltage level, the drift region of the device can be shorter, thus reducing the on-resistance. When the length of drift region is 35 渭 m, the same voltage level as that of step doped P column structure in 50 渭 m drift region is obtained.
【学位授予单位】：南京邮电大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN386
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