大规模互连线模型降阶算法研究
发布时间：2018-09-07 18:20
【摘要】：随着集成电路规模的逐渐增大,当前集成电路的互连线已经达到数十万级的规模,如此庞大的互连电路网络已经无法使用传统的电路模拟工具进行有效的分析,互连线问题已经成为制约集成电路发展的主要问题之一。因此利用模型降阶技术对这样的高阶模型进行降阶处理已经成为了集成电路发展的关键。本文首先对大规模互连线模型的建模算法进行研究,利用改进的节点电压法(MNA)对国际测试库给出的互连线网络建模,得到一个四输入四输出的980阶模型,通过仿真后对该模型的性质进行了分析。针对该模型文中主要利用以下三类模型降阶算法进行降阶,分别为1.SVD模型降阶法;2.有理Krylov模型降阶法;3.SVD-Krylov模型降阶法。对基于SVD的平衡截断方法(BR)、基于Krylov的矩匹配法(RK)这两种传统的模型降阶算法进行了详细的研究,并且利用这两种算法分别对CDPLayer模型、Iss模型进行降阶,从而得到这两种算法的降阶性质。综合这两种算法的特质以及优势后,本文引出了最小二乘法(LS),该方法可以说是一种SVD-Krylov算法。在最小二乘法的基础上,通过引入平移算子,提出了等式约束最小二乘法(ECLS),该算法可以使得降阶模型能够准确的匹配原高阶模型的前r+i个模,并且对其余的高阶项也采用了最小二乘逼近的方式,从而大大提高了降阶精度(这里r表示降阶后模型的阶数,i为非负整数,1≤ir)。分别利用上述四种算法将建立的互连线模型降阶至30阶,通过仿真对比,使用本文提出的ECLS算法对大规模互连线模型进行降阶,能够使降阶模型更好的与原模型相匹配,降低了降阶带来的误差,大大缩短了降阶时间,证实了该方法的有效性。
[Abstract]:With the increasing scale of integrated circuits, the interconnection of integrated circuits has reached the scale of hundreds of thousands of levels, so it is impossible for such a large interconnect circuit network to use traditional circuit simulation tools for effective analysis. Interconnection problem has become one of the main problems restricting the development of integrated circuits. Therefore, the use of model reduction technology to reduce the order of such high-order models has become the key to the development of integrated circuits. In this paper, the modeling algorithm of large-scale interconnection model is studied, and a 980th order model with four inputs and four outputs is obtained by using the improved nodal voltage method (MNA) to model the interconnect network provided by the international test library. The properties of the model are analyzed by simulation. In this paper, we mainly use the following three models to reduce the order of the model, respectively, 1.SVD model reduction algorithm. The rational Krylov model reduction method is used to reduce the order of SVD-Krylov model. In this paper, two traditional model order reduction algorithms, (RK) based on Krylov, are studied in detail, which are the balanced truncation method based on SVD. The two algorithms are used to reduce the order of CDPLayer model. The order reduction properties of these two algorithms are obtained. After synthesizing the characteristics and advantages of the two algorithms, this paper leads to the least square method (LS), which can be said to be a SVD-Krylov algorithm. On the basis of the least square method, by introducing the translation operator, the equal-constrained least square method (ECLS),) is proposed. The algorithm can make the reduced-order model match the first Ri modules of the original high-order model accurately. The other higher order terms are also approximated by least square method, which greatly improves the order reduction accuracy (where r denotes that the order I of the reduced order model is a non-negative integer n 1 鈮，
本文编号：2229053
[Abstract]:With the increasing scale of integrated circuits, the interconnection of integrated circuits has reached the scale of hundreds of thousands of levels, so it is impossible for such a large interconnect circuit network to use traditional circuit simulation tools for effective analysis. Interconnection problem has become one of the main problems restricting the development of integrated circuits. Therefore, the use of model reduction technology to reduce the order of such high-order models has become the key to the development of integrated circuits. In this paper, the modeling algorithm of large-scale interconnection model is studied, and a 980th order model with four inputs and four outputs is obtained by using the improved nodal voltage method (MNA) to model the interconnect network provided by the international test library. The properties of the model are analyzed by simulation. In this paper, we mainly use the following three models to reduce the order of the model, respectively, 1.SVD model reduction algorithm. The rational Krylov model reduction method is used to reduce the order of SVD-Krylov model. In this paper, two traditional model order reduction algorithms, (RK) based on Krylov, are studied in detail, which are the balanced truncation method based on SVD. The two algorithms are used to reduce the order of CDPLayer model. The order reduction properties of these two algorithms are obtained. After synthesizing the characteristics and advantages of the two algorithms, this paper leads to the least square method (LS), which can be said to be a SVD-Krylov algorithm. On the basis of the least square method, by introducing the translation operator, the equal-constrained least square method (ECLS),) is proposed. The algorithm can make the reduced-order model match the first Ri modules of the original high-order model accurately. The other higher order terms are also approximated by least square method, which greatly improves the order reduction accuracy (where r denotes that the order I of the reduced order model is a non-negative integer n 1 鈮，
本文编号：2229053
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