集成功率NMOSFET的锂电池保护芯片关键技术研究

发布时间：2018-10-17 15:03

【摘要】：本文针对于传统锂电池保护芯片中重要技术模块,进行了深层次的研究与优化,基于tsmc0.18um工艺设计了其中相关改进的核心模块。本着以超低功耗的理念,进行了整体芯片电路的设计和实现。对于过充电保护、过充电保护释放、过放电保护及过放电保护释放功能,只用单个单管比较器实现四个电压阈值保护的低功耗模块,采用迟滞比较器的特性来完成一组双阈值的比较器输出翻转,再通过电源电压高低来控制采样电压来区分另外一组的双阈值,从而完成单个比较器的四阈值翻转特性,利用带隙基准原理将比较器阈值进行零温度处理并进行电阻修调,修调后温漂最高值为29.08ppm,以保证阈值的精确度。为进一步优化功耗的损耗,在电路中加入两相非交叠时钟,两种相位的时钟通过控制两个比较器的核心结构的断开与连接工作,使电流和电压比较器不同时工作在同一个相位,从而使得两组比较器的整体平均功耗降至5uA以内。两相不交叠时钟的源时钟通过振荡器来提供,振荡器的设计是基于三级环振结构设计的环形振荡器产生5.46MHZ左右时钟频率,为电路提供了稳定的时钟脉冲。所设计的振荡器电路不仅为两相不交叠时钟提供输入,另外其还为延时模块提供输入时钟。延时电路的设计思想基本是通过多个边沿的D触发器完成的,其对于各个比较器的输出信号进行不同的延时,其目的在于防止由电源的噪声引起比较器意外翻转,从而导致的相关保护电路误操作。通过延时之后,便可消除电源中噪声的影响。另外,作为锂电池保护芯片中另外一个重要的模块,作为开关管的功率NMOSFET的导通电阻优化方案,同时为了保证功率管可以导通大电流的特点,选取了特殊的华夫饼式功率管版图结构的设计版图面积958.7μm*409.5μm导通电阻值为22mΩ,对比来完成功率管的导通电阻的优化,进而完成版图面积的优化。
[Abstract]:In this paper, the important technical modules in the traditional lithium battery protection chip are studied and optimized deeply, and the core modules are designed based on the tsmc0.18um process. Based on the idea of ultra-low power consumption, the design and implementation of the whole chip circuit are carried out. For over-charge protection, over-charge protection release, over-discharge protection and over-discharge protection release function, only a single single-transistor comparator is used to realize four low-power modules with voltage threshold protection. The hysteresis comparator is used to complete the output flip of a group of comparators with double thresholds, and the sampling voltage is controlled by the power supply voltage to distinguish the double thresholds of another group, thus the four threshold flipping characteristics of a single comparator are completed. By using the bandgap reference principle, the comparator threshold is treated with zero temperature and the resistor is adjusted. The maximum temperature drift of the comparator is 29.08 ppm, so as to ensure the accuracy of the threshold. In order to further optimize the loss of power consumption, a two-phase non-overlapping clock is added to the circuit. The clock with two phases works by controlling the disconnection and connection of the core structure of the two comparators, which makes the current and voltage comparators work in the same phase at the same time. Thus, the overall average power consumption of the two groups of comparators is reduced to less than 5uA. The source clock of the two-phase non-overlapping clock is provided by the oscillator. The oscillator is designed based on the three-stage ring oscillator structure to generate the 5.46MHZ clock frequency, which provides a stable clock pulse for the circuit. The designed oscillator circuit not only provides input for two phase nonoverlapping clock, but also provides input clock for delay module. The design idea of delay circuit is basically completed by multiple edge D flip-flop, which delays the output signals of each comparator differently, and the purpose of the delay circuit is to prevent the comparator from overturning accidentally by the noise of the power supply. As a result of the related protection circuit misoperation. After the delay, the noise in the power supply can be eliminated. In addition, as another important module in the lithium battery protection chip, as the on-resistance optimization scheme of the switching tube power NMOSFET, at the same time, in order to ensure that the power tube can switch on the characteristics of large current, The designed layout area of the special Wafer type power transistor layout structure is 958.7 渭 m, 409.5 渭 m, the on-resistance value is 22m 惟, which is compared to optimize the on-resistance of the power transistor and then to optimize the layout area.
【学位授予单位】：北方工业大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN386;TM912

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