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基于MATLAB的射频功放数字预失真方案设计与验证

发布时间:2018-10-31 11:27
【摘要】:射频功放是无线通信中必不可少的组件,用于对信号功率进行放大。由于射频功放在提高信号功率的同时,也会伴随产生记忆非线性失真,因此,解决功放的记忆非线性失真特性显得尤为关键。数字预失真具有高效和易于工程实现等优点,使其成为解决这一问题的普遍方法。本文使用MATLAB的SYSGEN模块实现了一种构造简单、功放失真特性改善程度较好的数字预失真系统。主要内容包括:第一,介绍了功率放大器的相关特征以及数字预失真的主要技术。通过理论分析以及MATLAB仿真比较几种学习结构,选择使用间接学习结构;比较了三种经典的辨识算法模型,选择使用实现和计算都较为简单且开销较小的最小均方自适应(Least Mean Square,LMS)算法;比较几种预失真器模型,选择使用记忆多项式模型,并且在资源开销与性能综合考虑下选择了记忆深度为3、非线性阶数为5的实现方案。第二,根据选择的模型与参数,在SYSGEN平台上搭建了数字预失真系统。该系统包括信号源、预失真器、功率放大器模型、正交调制/解调、数据缓存和预失真算法模块。并且,在SYSGEN中使用的MCode模块,可以直接调用.m文件进行预失真算法的计算,并返回抽头加权向量,极大地提高了建模的效率。第三,通过自主研发的软件无线电平台,对链路整体功能的正确性进行了验证:通过FPGA内部环回、FPGA夹层卡(FPGA Mezzanine Card,FMC)环回、射频功放环回,测试数字预失真系统的改善效果。功放输出的邻道泄漏比(Adjacent Channel Leakage Ratio,ACLR)满足3GPP关于ACLR小于-45d B的要求。证明了使用MATLAB的SYSGEN模块设计数字预失真系统的方案基本可行。本文使用的SYSGEN实现方案不需要使用Verilog语言即可搭建链路并实现功能。大大降低了开发的成本。
[Abstract]:RF power amplifier is an essential component in wireless communication, which is used to amplify the signal power. Because RF power amplifier can not only improve the signal power, but also produce memory nonlinear distortion, so it is very important to solve the memory nonlinear distortion characteristic of power amplifier. Digital predistortion has the advantages of high efficiency and easy to be realized in engineering, which makes it a universal method to solve this problem. In this paper, a digital predistortion system with simple structure and improved distortion characteristic of power amplifier is implemented by using SYSGEN module of MATLAB. The main contents are as follows: first, the characteristics of power amplifier and the main technology of digital predistortion are introduced. Through theoretical analysis and MATLAB simulation several learning structures are compared and indirect learning structures are chosen. In this paper, three classical identification algorithms are compared, and the least mean square adaptive (Least Mean Square,LMS (MMSA) algorithm, which is easy to implement and compute, is chosen. Several predistorter models are compared, memory polynomial model is used, and memory depth is 3 and nonlinear order is 5 under the consideration of resource overhead and performance. Secondly, according to the selected model and parameters, a digital predistortion system is built on SYSGEN platform. The system includes signal source, predistorter, power amplifier model, quadrature modulation / demodulation, data buffer and predistortion algorithm module. Moreover, the MCode module used in SYSGEN can directly call the .m file to calculate the predistortion algorithm and return the tap weighting vector, which greatly improves the efficiency of modeling. Thirdly, the correctness of the whole link function is verified by the software radio platform developed by ourselves: through the FPGA internal loop, the FPGA sandwich card (FPGA Mezzanine Card,FMC loop, the RF power amplifier loop, Test the improvement of digital pre-distortion system. The adjacent channel leakage ratio (Adjacent Channel Leakage Ratio,ACLR) of the power amplifier output satisfies the 3GPP requirement that the ACLR is less than-45 dB. It is proved that the scheme of designing digital predistortion system with SYSGEN module of MATLAB is feasible. The SYSGEN implementation scheme in this paper does not need to use Verilog language to build the link and realize the function. The cost of development is greatly reduced.
【学位授予单位】:电子科技大学
【学位级别】:硕士
【学位授予年份】:2017
【分类号】:TN722.75

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