基于OR1200的SoC无线程序加载系统设计与验证
发布时间：2018-11-11 08:01
【摘要】：SoC(System-on-chip)是指在一个芯片上集成完整的系统,也是现在运用很广的一种芯片设计方法之一。SoC设计不是以功能电路为基础的技术,而是以IP核为基础搭建系统,实现IP核的复用。这样能提高工作效率、节约成本、增加系统功能、减少出错率等。常见的SoC系统一般包括处理器、总线、存储模块、时钟模块和外设等。对于SoC设计来说,搭好环境后,还得有相应的一套IDE开发工具,包括装有配套开发环境的PC,电路板和连接线。开发完成后应用于嵌入式领域,一般很难支持二次开发。或者支持二次开发,但是受带开发环境的PC终端、电路板、连接线等条件的约束很不方便。因此,本论文中提出一种基于OR1200的无线智能程序加载SoC设计方案,使得芯片能方便的实现二次开发,摆脱带开发环境的PC终端、开发板、连接线等条件的约束,增加芯片的利用率,简化二次开发流程。其中OR1200是开源项目OpenRISC项目的一个子项目,采用的是Harvard结构,是32位的RISC处理器,具有免费、开源、简单、低功耗和可扩展等优点。性能上来说相当于ARM9的性能。本文所述基于OR1200的SoC程序加载系统中,它至少包括处理器、只读存储器、总线仲裁模块、串行外设接口、内存模块、通用异步收发传输器、时钟模块等。Wishbone总线仲裁采用轮循机制实现主设备与从设备之间的访问。此文改变了传统的把一个程序存储在flash中,当烧录下一个程序时就会覆盖上一个程序的做法,而把flash划分成三个程序区。烧录flash时,把不同的程序放在不同的程序区。当从SPI flash启动时,程序指针首先指向只读存储器ROM里面的Bootload区,以完成程序从flash拷贝到内存,再从内存开始执行指令,实现系统的自启动。此外,本文设计在此基础上增加了Bootload的功能,即不仅能完成程序的拷贝,还能监测串口,根据收到的命令选择一个程序区的程序拷贝到内存。使得芯片封装好之后,无需接线,无需相应的IDE软件来加载程序,通过手机或带有蓝牙模块的终端就可以加载不同的程序,此设计在智能终端领域能有很好的应用。基于SoC的无线智能程序加载方法步骤如下:搭建SoC系统;将加载启动代码烧录至只读存储器中;将flash存储器分区并加载不同的程序;初始化串行外设接口和通用异步收发传输器,从flash存储器中选择相应程序区实现程序到内存模块的拷贝;执行跳转命令,将处理器指向内存模块的起始位置,实现系统的自启动。通过带蓝牙功能的终端发送不同的命令即可选择flash程序区中不同的程序加载到内存模块,通过无线控制实现不同程序的加载。本论文中不仅描述了一种基于OR1200的SoC程序加载方案,还实现了此方案的设计,经过EDA工具综合和仿真后,在Xilinx开发板上进行下板测试。
[Abstract]:SoC (System-on-chip) refers to the integration of a complete system on a chip, which is also one of the most widely used chip design methods. SoC design is not based on functional circuit technology, but based on IP core. The reuse of IP core is realized. This can improve working efficiency, save cost, increase system function, reduce error rate and so on. Common SoC systems generally include processors, buses, storage modules, clock modules and peripherals. For the SoC design, there must be a set of IDE development tools, including the PC, circuit board and connection wire, which are equipped with the supporting development environment. After the development is completed, it is difficult to support the secondary development when it is applied to the embedded field. Or support secondary development, but with the development environment of PC terminals, circuit boards, connectors and other constraints are very inconvenient. Therefore, this paper proposes a wireless intelligent program loading SoC design scheme based on OR1200, which makes the chip realize secondary development conveniently and get rid of the constraints of PC terminal, development board, connection line and so on. Increase the utilization rate of the chip, simplify the secondary development process. OR1200 is a subproject of the open source project OpenRISC, which uses Harvard structure and is a 32-bit RISC processor with the advantages of free, open source, simple, low power consumption and extensibility. Performance is equivalent to that of ARM9. In the SoC program loading system based on OR1200, it includes at least processor, read-only memory, bus arbitration module, serial peripheral interface, memory module, universal asynchronous transceiver, etc. Clock module and so on. Wishbone bus arbitration uses the wheel-based mechanism to achieve access between master and slave devices. This paper changes the traditional method of storing a program in flash, which overwrites a program when the next program is burned, and divides flash into three program regions. When burning flash, put different programs in different program areas. When starting from SPI flash, the program pointer first points to the Bootload area in the read-only memory (ROM) to complete the program copying from flash to memory, and then executes instructions from memory to realize the self-start of the system. In addition, this paper adds the function of Bootload, which can not only complete the copy of the program, but also monitor the serial port, and select a program copy to the memory according to the commands received. After the chip encapsulation, no wiring, no corresponding IDE software to load the program, through the mobile phone or the terminal with Bluetooth module can load different programs, this design can be used in the field of smart terminals. The method of wireless intelligent program loading based on SoC is as follows: build SoC system; burn load start code into read-only memory; partition flash memory and load different programs; The serial peripheral interface and the universal asynchronous transceiver are initialized, and the corresponding program area is selected from the flash memory to realize the copy of the program to the memory module. Execute jump command, point the processor to the starting position of the memory module, realize the self-start of the system. Different programs in the flash program area can be selected to load into the memory module by sending different commands from the terminal with Bluetooth function, and different programs can be loaded by wireless control. In this paper, not only a SoC program loading scheme based on OR1200 is described, but also the design of this scheme is realized. After the EDA tool synthesis and simulation, the next board test is carried out on the Xilinx development board.
【学位授予单位】：湘潭大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN402
本文编号：2324254
[Abstract]:SoC (System-on-chip) refers to the integration of a complete system on a chip, which is also one of the most widely used chip design methods. SoC design is not based on functional circuit technology, but based on IP core. The reuse of IP core is realized. This can improve working efficiency, save cost, increase system function, reduce error rate and so on. Common SoC systems generally include processors, buses, storage modules, clock modules and peripherals. For the SoC design, there must be a set of IDE development tools, including the PC, circuit board and connection wire, which are equipped with the supporting development environment. After the development is completed, it is difficult to support the secondary development when it is applied to the embedded field. Or support secondary development, but with the development environment of PC terminals, circuit boards, connectors and other constraints are very inconvenient. Therefore, this paper proposes a wireless intelligent program loading SoC design scheme based on OR1200, which makes the chip realize secondary development conveniently and get rid of the constraints of PC terminal, development board, connection line and so on. Increase the utilization rate of the chip, simplify the secondary development process. OR1200 is a subproject of the open source project OpenRISC, which uses Harvard structure and is a 32-bit RISC processor with the advantages of free, open source, simple, low power consumption and extensibility. Performance is equivalent to that of ARM9. In the SoC program loading system based on OR1200, it includes at least processor, read-only memory, bus arbitration module, serial peripheral interface, memory module, universal asynchronous transceiver, etc. Clock module and so on. Wishbone bus arbitration uses the wheel-based mechanism to achieve access between master and slave devices. This paper changes the traditional method of storing a program in flash, which overwrites a program when the next program is burned, and divides flash into three program regions. When burning flash, put different programs in different program areas. When starting from SPI flash, the program pointer first points to the Bootload area in the read-only memory (ROM) to complete the program copying from flash to memory, and then executes instructions from memory to realize the self-start of the system. In addition, this paper adds the function of Bootload, which can not only complete the copy of the program, but also monitor the serial port, and select a program copy to the memory according to the commands received. After the chip encapsulation, no wiring, no corresponding IDE software to load the program, through the mobile phone or the terminal with Bluetooth module can load different programs, this design can be used in the field of smart terminals. The method of wireless intelligent program loading based on SoC is as follows: build SoC system; burn load start code into read-only memory; partition flash memory and load different programs; The serial peripheral interface and the universal asynchronous transceiver are initialized, and the corresponding program area is selected from the flash memory to realize the copy of the program to the memory module. Execute jump command, point the processor to the starting position of the memory module, realize the self-start of the system. Different programs in the flash program area can be selected to load into the memory module by sending different commands from the terminal with Bluetooth function, and different programs can be loaded by wireless control. In this paper, not only a SoC program loading scheme based on OR1200 is described, but also the design of this scheme is realized. After the EDA tool synthesis and simulation, the next board test is carried out on the Xilinx development board.
【学位授予单位】：湘潭大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN402
【参考文献】
相关硕士学位论文 前2条
1 彭章超;基于Leon3处理器SoC低功耗设计研究[D];合肥工业大学;2007年
2 刘凯;OpenRISC1200处理器的研究和验证[D];西安电子科技大学;2007年
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