基于SiGe HBT工艺的功率放大器模块及单片电路的设计
发布时间：2018-11-18 08:38
【摘要】：无线通信技术的飞速发展极大地改变了人们的日常通信交流方式,而射频功率放大器作为无线收发机中的核心模块之一,其性能很大程度上关系到信号传输的质量以及功率的消耗。随着4G通信标准的逐渐普及,为了适应更高速高质量的信息传输,射频功率放大器的效率和线性度等参数指标也必须相应地提高,使得功率放大器的设计成为射频前端设计中的重点和热点。目前市场上的射频功率放大器大部分采用的是GaAs、InGaP等工艺,而SiGe HBT(Heterojunction Bipolar Transistor,异质结双极型晶体管)由于其成本低、特征频率高、噪声和散热性能好等优点,在无线通信领域有着非常广阔的应用前景。本文采用0.18 μm SiGe HBT工艺设计了工作在2.4 GHz应用于WLAN (Wireless Local Area Networks,无线局域网)领域的一款功率放大器单片电路以及一款高线性输出功率的板级放大器模块。功率放大器单片电路采用三级放大电路级联的结构,偏置在AB类工作状态以兼顾线性度和效率；通过添加适当大小的基极镇流电阻以提高放大电路的稳定性；采用白适应线性化偏置电路,自动调整功率放大器工作时的偏置状态,以提高放大器的线性度和增益；输出端采用Loadpull(负载牵引)匹配方式以获得最大输出功率,灵活选择级间和输入端匹配网络以实现最大功率传输。芯片版图设计时充分考虑寄生因素和散热性能。最终该芯片的测试结果为：1 dB压缩点输出功率为23.4 dBm,增益为28.8 dB,功率附加效率为13.6%。板级功率放大器模块是利用三级功率单元(powercell)芯片在PCB (Printed Circuit Board,印刷电路板)上进行匹配调试完成。根据每一级放大电路在增益和输出功率上的侧重点合理选择功率单元；依据功率单元测试PCB设计TRL校准件；利用TRL校准方式以获得各功率单元芯片较为精确的输入输出匹配阻抗,逐级进行级间匹配以达到高线性输出功率的指标。最终该放大器模块的测试结果为：对于64QAM(正交幅度调制)信号,当EVM(错误矢量幅度)为3%时,输出功率为18.26 dBm,增益为28.5 dB,线性度良好。
[Abstract]:The rapid development of wireless communication technology has greatly changed people's daily communication mode, and RF power amplifier is one of the core modules in wireless transceiver. To a great extent, its performance is related to the quality of signal transmission and the consumption of power. With the popularization of 4G communication standard, in order to adapt to the higher speed and high quality information transmission, the efficiency and linearity of RF power amplifier must be improved accordingly. The design of power amplifier has become the focus of RF front-end design. At present, most of the RF power amplifiers in the market use GaAs,InGaP technology, while SiGe HBT (Heterojunction Bipolar Transistor, heterojunction bipolar transistors) have the advantages of low cost, high characteristic frequency, good noise and heat dissipation, etc. In the field of wireless communication has a very broad application prospects. In this paper, a single chip circuit of power amplifier and a board amplifier module with high linear output power are designed in the field of 2.4 GHz applied in WLAN (Wireless Local Area Networks, wireless local area network (WLAN) using 0.18 渭 m SiGe HBT process. The power amplifier monolithic circuit adopts the three-stage amplifier circuit cascade structure, which is biased in the AB working state to give consideration to the linearity and efficiency, and improves the stability of the amplifier circuit by adding the base ballast resistor of the appropriate size to improve the stability of the amplifier circuit. In order to improve the linearity and gain of the amplifier, the bias state of the power amplifier is automatically adjusted by using the white adaptive linearization bias circuit. The output terminal adopts Loadpull (load traction) matching method to obtain the maximum output power and flexibly selects the matching network between the stages and the input terminal to realize the maximum power transmission. The parasitic factors and heat dissipation are fully considered in the chip layout design. The final test results of the chip are as follows: 1 the output power of dB compression point is 23.4 dBm, gain is 28.8 dB, power addition efficiency is 13.6. The board level power amplifier module is completed by matching and debugging on PCB (Printed Circuit Board, printed circuit board using three level power unit (powercell) chip. According to the emphasis of each amplifier circuit on gain and output power, the power unit is selected reasonably, and the TRL calibrator is designed according to the power unit test PCB. The TRL calibration method is used to obtain the more accurate input and output matching impedance of each power unit chip, and step by step matching between stages to achieve the target of high linear output power. Finally, the test results of the amplifier module are as follows: for 64QAM (orthogonal amplitude modulation) signal, when the EVM (error vector amplitude) is 3, the output power is 18.26 dBm, gain and the linearity is 28.5 dB,.
【学位授予单位】：山东大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN722.75
本文编号：2339499
[Abstract]:The rapid development of wireless communication technology has greatly changed people's daily communication mode, and RF power amplifier is one of the core modules in wireless transceiver. To a great extent, its performance is related to the quality of signal transmission and the consumption of power. With the popularization of 4G communication standard, in order to adapt to the higher speed and high quality information transmission, the efficiency and linearity of RF power amplifier must be improved accordingly. The design of power amplifier has become the focus of RF front-end design. At present, most of the RF power amplifiers in the market use GaAs,InGaP technology, while SiGe HBT (Heterojunction Bipolar Transistor, heterojunction bipolar transistors) have the advantages of low cost, high characteristic frequency, good noise and heat dissipation, etc. In the field of wireless communication has a very broad application prospects. In this paper, a single chip circuit of power amplifier and a board amplifier module with high linear output power are designed in the field of 2.4 GHz applied in WLAN (Wireless Local Area Networks, wireless local area network (WLAN) using 0.18 渭 m SiGe HBT process. The power amplifier monolithic circuit adopts the three-stage amplifier circuit cascade structure, which is biased in the AB working state to give consideration to the linearity and efficiency, and improves the stability of the amplifier circuit by adding the base ballast resistor of the appropriate size to improve the stability of the amplifier circuit. In order to improve the linearity and gain of the amplifier, the bias state of the power amplifier is automatically adjusted by using the white adaptive linearization bias circuit. The output terminal adopts Loadpull (load traction) matching method to obtain the maximum output power and flexibly selects the matching network between the stages and the input terminal to realize the maximum power transmission. The parasitic factors and heat dissipation are fully considered in the chip layout design. The final test results of the chip are as follows: 1 the output power of dB compression point is 23.4 dBm, gain is 28.8 dB, power addition efficiency is 13.6. The board level power amplifier module is completed by matching and debugging on PCB (Printed Circuit Board, printed circuit board using three level power unit (powercell) chip. According to the emphasis of each amplifier circuit on gain and output power, the power unit is selected reasonably, and the TRL calibrator is designed according to the power unit test PCB. The TRL calibration method is used to obtain the more accurate input and output matching impedance of each power unit chip, and step by step matching between stages to achieve the target of high linear output power. Finally, the test results of the amplifier module are as follows: for 64QAM (orthogonal amplitude modulation) signal, when the EVM (error vector amplitude) is 3, the output power is 18.26 dBm, gain and the linearity is 28.5 dB,.
【学位授予单位】：山东大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN722.75
【参考文献】
相关期刊论文 前1条
1 周卫;刘道广;严利人;;SiGe HBT的发展及其在微波/射频通讯中的应用[J];微电子学;2006年05期
，本文编号：2339499
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