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基于FPGA的多通道高速数据采集系统设计

发布时间:2018-12-08 16:46
【摘要】:随着计算机和微电子技术的发展,雷达、通信等众多应用领域对于数据采集系统提出了更高的要求,数据采集正在向着多通道、高采样率、高分辨率、大容量存储和高速传输速率方向快速发展。本文根据当前国内外的研究现状,针对某雷达成像项目中数据采集系统的指标要求,设计了一款基于FPGA的多通道高速数据采集系统,该系统以FPGA作为整个系统的控制、处理核心,通过AD模块实现数据的采集与模数转换,并将采集到的数据传输至FPGA,在FPGA内进行处理后将数据传输至相关板卡,同时通过PCI接口技术实现FPGA与上位机端的通信。FPGA作为系统的控制核心芯片可提高系统稳定性、减少设备体积。本文分为硬件设计和软件设计两部分,提出了高速数据采集系统的设计方案。硬件设计包括各器件的选型、原理分析、外围电路设计及PCB设计,软件设计作为本文的核心部分,包括FPGA的逻辑设计与仿真测试,实现了AD模块的数据采集功能、基于PCI接口的C模式工作状态下FPGA与上位机端的通信功能以及基于GTX模块的高速串行数据传输功能。论文的最后通过搭建硬件测试平台,完成系统软硬件联调工作,给出了相关测试结果,进一步验证了方案的可行性。论文的框架围绕AD模块、PCI模块及GTX模块展开,该系统具有多通道、高采样率、高数据传输带宽等特点。论文的研究工作为后续的图像处理提供了有力的支持,在高速数据采集及其相关领域有着广泛的应用前景。
[Abstract]:With the development of computer and microelectronics technology, radar, communication and many other application fields put forward higher requirements for data acquisition system. Data acquisition is towards multi-channel, high sampling rate, high resolution. Large-capacity storage and high-speed transmission rate are developing rapidly. According to the current research situation at home and abroad, a multi-channel high-speed data acquisition system based on FPGA is designed according to the requirement of data acquisition system in a radar imaging project. The system takes FPGA as the control of the whole system. The core of processing is to realize data acquisition and analog-to-digital conversion through AD module, and transfer the collected data to FPGA, after processing in FPGA, and then transfer the data to the relevant card. At the same time, the communication between FPGA and upper computer can be realized by PCI interface technology. As the control core of the system, FPGA can improve the stability of the system and reduce the volume of the equipment. This paper is divided into two parts: hardware design and software design. The hardware design includes the selection of each device, principle analysis, peripheral circuit design and PCB design, software design as the core part of this paper, including the logic design and simulation test of FPGA. The data acquisition function of AD module is realized. The communication function between FPGA and the upper computer in C mode based on PCI interface and the high speed serial data transmission function based on GTX module. At the end of the paper, the hardware and software of the system are adjusted by building the hardware test platform, and the related test results are given, and the feasibility of the scheme is further verified. The framework of this paper is based on AD module, PCI module and GTX module. The system has the characteristics of multi-channel, high sampling rate and high data transmission bandwidth. The research work in this paper provides a powerful support for the subsequent image processing and has a wide application prospect in high-speed data acquisition and related fields.
【学位授予单位】:北京理工大学
【学位级别】:硕士
【学位授予年份】:2015
【分类号】:TN791;TP274.2

【参考文献】

相关期刊论文 前2条

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