高速PCB设计中信号及电源完整性分析与应用
发布时间：2019-01-05 03:58
【摘要】：随着集成电路技术的快速发展,高速电路中信号及电源完整性问题日益明显,对电路系统的稳定性造成了极大影响,并已成为电子工程师在电路设计过程中不可避免的问题之一,正确处理设计及调试过程中的信号及电源完整性问题已成为高速电路设计中的重要环节。本文分析了无源元件及传输线的高频特性,以及高速互连设计中存在的反射、串扰、时序及电源完整性问题的产生原因,并确定了各类噪声及时序问题的优化方法。在高速互连理论的基础上对一款以i.MX6Q为核心的复杂高速电路板进行设计,利用IBIS模型和HyperLynx仿真工具在板级设计中对信号及电源完整性问题进行仿真分析及优化。根据仿真结果制定布线约束及去耦规则,建立了完整的设计及仿真过程,使串扰噪声、反射噪声、时序误差及电源噪声控制在可接受的范围内。系统使用八层PCB设计,优化布局布线使高速互连串扰噪声峰值降低为20mV;使用ODT功能控制反射噪声在极小的幅度内;控制线长使命令线、控制线及数据线满足时序要求;优化PDN阻抗曲线,减小电源噪声,最终完成PCB的设计及调试。本文在高速PCB设计及仿真的研究中所得的仿真数据、优化方法及结论可以为与此相关的高速电路设计提供一定参考。
[Abstract]:With the rapid development of integrated circuit technology, the problem of signal and power integrity in high-speed circuits becomes more and more obvious, which has a great impact on the stability of circuit system. It has become one of the inevitable problems in the circuit design of electronic engineers. It has become an important link in the design of high-speed circuits to correctly deal with the problems of signal and power supply integrity in the process of design and debugging. This paper analyzes the high frequency characteristics of passive components and transmission lines, and the causes of the problems of reflection, crosstalk, timing and power supply integrity in the design of high speed interconnection, and determines the optimization methods for all kinds of noise and timing problems. Based on the theory of high speed interconnection, a complex high speed circuit board with i.MX6Q as its core is designed. The signal and power integrity problems are simulated and optimized by using IBIS model and HyperLynx simulation tool in board level design. According to the simulation results, the routing constraints and decoupling rules are formulated, and a complete design and simulation process is established to control crosstalk noise, reflection noise, timing error and power supply noise within an acceptable range. The system uses 8-layer PCB design, optimizes layout and wiring to reduce the peak value of crosstalk noise to 20mV, uses ODT function to control the reflected noise in a minimum amplitude, and the control line length makes the command line, control line and data line meet the requirements of time sequence. The impedance curve of PDN is optimized to reduce the noise of power supply. Finally, the design and debugging of PCB are finished. The simulation data, optimization methods and conclusions obtained in the research of high speed PCB design and simulation can provide some reference for the design of high speed circuits.
【学位授予单位】：中国矿业大学
【学位级别】：硕士
【学位授予年份】：2016
【分类号】：TN41
本文编号：2401230
[Abstract]:With the rapid development of integrated circuit technology, the problem of signal and power integrity in high-speed circuits becomes more and more obvious, which has a great impact on the stability of circuit system. It has become one of the inevitable problems in the circuit design of electronic engineers. It has become an important link in the design of high-speed circuits to correctly deal with the problems of signal and power supply integrity in the process of design and debugging. This paper analyzes the high frequency characteristics of passive components and transmission lines, and the causes of the problems of reflection, crosstalk, timing and power supply integrity in the design of high speed interconnection, and determines the optimization methods for all kinds of noise and timing problems. Based on the theory of high speed interconnection, a complex high speed circuit board with i.MX6Q as its core is designed. The signal and power integrity problems are simulated and optimized by using IBIS model and HyperLynx simulation tool in board level design. According to the simulation results, the routing constraints and decoupling rules are formulated, and a complete design and simulation process is established to control crosstalk noise, reflection noise, timing error and power supply noise within an acceptable range. The system uses 8-layer PCB design, optimizes layout and wiring to reduce the peak value of crosstalk noise to 20mV, uses ODT function to control the reflected noise in a minimum amplitude, and the control line length makes the command line, control line and data line meet the requirements of time sequence. The impedance curve of PDN is optimized to reduce the noise of power supply. Finally, the design and debugging of PCB are finished. The simulation data, optimization methods and conclusions obtained in the research of high speed PCB design and simulation can provide some reference for the design of high speed circuits.
【学位授予单位】：中国矿业大学
【学位级别】：硕士
【学位授予年份】：2016
【分类号】：TN41
【相似文献】
相关期刊论文 前7条
1 王婷;;高速PCB中电源完整性的仿真与分析[J];科技广场;2011年07期
2 丁高,牟志新,张望;高速PCB中电源完整性的设计[J];电子质量;2005年11期
3 申伟;唐万明;王杨;;高速PCB的电源完整性分析[J];现代电子技术;2009年24期
4 于增贵;高级系统保护软件包[J];通信技术;1989年03期
5 王婷;;浅谈高速电路设计中电源完整性问题[J];硅谷;2010年20期
6 马守兴;邱兵;;利用Allegro PCB PI进行电源完整性设计[J];无线电工程;2007年08期
7 ;[J];;年期
相关硕士学位论文 前3条
1 李楷;高速PCB设计中信号及电源完整性分析与应用[D];中国矿业大学;2016年
2 张建新;高速PCB的信号和电源完整性问题研究[D];西安电子科技大学;2012年
3 刘春天;高速电路馈电接地系统的电源完整性研究[D];上海交通大学;2010年
，本文编号：2401230
本文链接：https://www.wllwen.com/kejilunwen/dianzigongchenglunwen/2401230.html
