SiC超结VDMOS研究与优化设计

发布时间：2019-01-16 02:55

【摘要】：随着SiC技术的发展,SiC功率器件性能的提升会像Si功率器件一样受到理论极限的制约。因此将打破Si限的超结结构应用到SiC器件中进一步提升功率器件性能具有顺应时代发展需要,满足器件应用领域的重要意义。本文主要设计并优化了一款1400VSiC超结VDMOS的元胞结构,主要工作及成果如下:首先,对SiC VDMOS的基本结构和基本工作原理进行研究,介绍VDMOS的主要静态参数:阈值电压、击穿电压、导通电阻,并分析了器件各部分设计参数(长度、注入深度、掺杂浓度等)对其静态电特性的影响。另外还研究了超结的基本理论和设计公式,并分析了超结的设计参数对击穿电压和导通电阻的影响。其次,对漂移区、JFET区、沟道、P型阻挡层、P型基区等1400V碳化硅超结VDMOS元胞区元胞的基本参数进行设计并优化。以1400V阻断电压为设计目标,兼顾特征导通电阻和器件工作的可靠性,在理论分析基础上,采用TCAD仿真软件基于器件特性数据,分析了各区浓度和尺寸、超结结构参数对MOSFET功率参数的影响,基于影响曲线,折中考虑击穿电压,导通电阻,JFET区栅氧化层击穿,P阱区穿通,阈值电压等因素,确定了超结VDMOS元胞区各区的参数,分别为:漂移区厚度9um、超结P柱、N柱浓度均为1.9×1016cm-3-,JFET区长度(0.5um*2),沟道长度0.5um,P型阻挡层深度0.3um、浓度1.5×1018cm3,P型基区浓度5×1016cm-3等。最后,本文提出一种局部非平衡超结结构,其PN柱掺杂是采用局部失配,总体平衡进行的。将此结构应用到VDMOS中并与传统N型漂移区VDMOS、普通超结VDMOS进行对比。保证三者的厚度和浓度相同,比较击穿电压的变化,发现改进的局部失配超结VDMOS具有最高的击穿电压。同时还给出了三者的特征导通电阻,计算了品质因子(VB2/R),改进的局部失配超结结构的品质因子高于传统器件而低于完全平衡的普通超结结构。综上,本文的主要工作为设计并优化了可用于1400V阻断电压的SiC超结VDMOS元胞结构,提出了一种局部非平衡超结结构,研究结果表明超结结构有效提升了 SiC VDMOS的功率性能;而提出的局部非平衡超结结构则能够进一步提高SiC VDMOS的阻断电压,是一种提高SiC超结VDMOS耐压的有效方法。
[Abstract]:With the development of SiC technology, the performance improvement of SiC power devices will be restricted by the theoretical limit just as the Si power devices. Therefore, it is important to apply the superjunction structure which breaks the Si limit to the SiC devices to further improve the performance of the power devices, which meets the needs of the times and meets the needs of the application field of the devices. This paper mainly designs and optimizes the cellular structure of a 1400VSiC superjunction VDMOS. The main work and results are as follows: firstly, the basic structure and basic working principle of SiC VDMOS are studied, and the main static parameters of VDMOS are introduced: threshold voltage, breakdown voltage. The influence of the design parameters (length, injection depth, doping concentration, etc.) on the static electrical characteristics of the device is analyzed. In addition, the basic theory and design formula of overjunction are studied, and the influence of design parameters of overjunction on breakdown voltage and on-resistance is analyzed. Secondly, the basic parameters of 1400V silicon carbide superjunction VDMOS cell region, such as drift region, JFET region, channel, P-type barrier layer and P-type base region, are designed and optimized. Taking 1400V blocking voltage as the design target, taking into account the characteristic on-resistance and the reliability of the device, the concentration and size of each region are analyzed by using the TCAD simulation software based on the characteristic data of the device, based on the theoretical analysis. Based on the influence of the structure parameters on the power parameters of MOSFET, based on the influence curve, considering the breakdown voltage, on-resistance, JFET gate oxide breakdown, P-well breakdown, threshold voltage and so on, the parameters of the superjunction VDMOS cell are determined. The thickness of drift zone is 9um, the concentration of N column is 1.9 脳 1016cm-3-JFET (0.5um*2), the depth of channel length is 0.3ump barrier layer, and the concentration is 1.5 脳 1018cm3C3P type base area concentration 5 脳 1016cm-3, and so on, the drift zone thickness is 9 umum, the N column concentration is 1.9 脳 1016cm-3-JFET zone length (0.5um*2), the channel length is 0.5ump type barrier layer depth 0.3um. Finally, a local nonequilibrium superjunction structure is proposed, in which the PN column doping is carried out by local mismatch and overall equilibrium. The structure is applied to VDMOS and compared with the conventional N-type drift VDMOS, superjunction VDMOS. It is found that the improved local mismatched overjunction (VDMOS) has the highest breakdown voltage by comparing the breakdown voltage with the same thickness and concentration. At the same time, the characteristic on-resistance of the three devices is given, and the quality factor (VB2/R) is calculated. The quality factor of the improved local mismatch superjunction structure is higher than that of the conventional device and is lower than that of the conventional overjunction structure. In summary, the main work of this paper is to design and optimize the SiC superjunction VDMOS cell structure which can be used for 1400V blocking voltage. A local non-equilibrium superjunction structure is proposed. The results show that the superjunction structure can effectively improve the power performance of SiC VDMOS. The proposed local nonequilibrium superjunction structure can further improve the blocking voltage of SiC VDMOS and is an effective method to improve the VDMOS voltage of SiC overjunction.
【学位授予单位】：山东大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN386

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