中继平台上的SC-FDE系统方案研究与FPGA实现
发布时间：2019-02-23 21:17
【摘要】：随着通信系统传输速率的提高,信道的多径效应对信号的影响越来越大。本文着重研究近年来逐渐兴起的能够抵抗多径效应的SC-FDE系统。本文首先研究无线多径信道的特性,发现在无线信道中存在多径效应,在其中传输信号会受到码间干扰的影响。为了克服多径效应,本文对均衡技术进行了研究,着重对时域均衡和频域均衡进行了对比分析。通过研究发现,时频域的均衡器在系数确定方法和均衡器结构设计方面大致相同。但是对于高速通信系统,时域均衡器算法为指数级复杂度,不利于实现；频域均衡器算法为线性对数级复杂度,在数字系统中容易实现。 由于SC-FDE系统对定时频偏比较敏感,本文设计了适用于SC-FDE系统的同步方法。本文通过对经典同步算法的研究发现Park算法比SC与Minn算法性能更好,同步准确率更高,同时采用CAZAC序列作为Park算法的训练序列能够改善系统的同步性能,消除原始Park算法的虚假峰值。为了对SC-FDE系统中的频域处理资源进行复用,本文研究了频域同步方案,发现当在某一个数据块内包含所有的同步信息时,就能够使用频域同步。针对这一发现,本文提出了新型的频域同步方案。该方案以频域处理为基础,利用同步峰值在数据块内的位置信息,推导出同步码字的起始位置。新方案与原始频域同步方案相比同步头设计简单,同步性能更好,并且还可以复用SC-FDE系统资源,非常适合作为SC-FDE系统的同步方案。 最后,本文结合课题硬件平台,将SC-FDE整体系统分为同步子系统与FDE子系统,两个子系统分别完成后,进行联合设计得到整体系统。整体系统采用改进的频域同步方式,使用线性频域均衡,复用了FFT资源,在保证性能的前提下,节约了FPGA资源。
[Abstract]:With the increase of the transmission rate of communication system, the multipath effect of channel becomes more and more important. This paper focuses on the emerging SC-FDE system which can resist multipath effect in recent years. In this paper, we first study the characteristics of wireless multipath channel, and find that there is multipath effect in wireless channel, in which the transmission signal will be affected by inter-symbol interference (ISI). In order to overcome the multipath effect, the equalization technique is studied in this paper, and the time domain equalization and frequency domain equalization are compared and analyzed. It is found that the equalizer in time and frequency domain is similar in coefficient determination method and equalizer structure design. However, for high-speed communication systems, the time-domain equalizer algorithm is exponentially complex, which is not conducive to implementation; the frequency-domain equalizer algorithm is linear logarithmic complexity, which is easy to be implemented in digital systems. Because SC-FDE system is sensitive to timing frequency offset, a synchronization method suitable for SC-FDE system is designed in this paper. In this paper, we find that the performance of Park algorithm is better than that of SC and Minn algorithm, and the accuracy of synchronization is higher. At the same time, using CAZAC sequence as the training sequence of Park algorithm can improve the synchronization performance of the system. Eliminate the false peak of the original Park algorithm. In order to reuse the frequency domain processing resources in SC-FDE system, the frequency domain synchronization scheme is studied in this paper. It is found that frequency domain synchronization can be used when all synchronization information is included in a certain data block. In view of this discovery, a new frequency domain synchronization scheme is proposed in this paper. Based on frequency domain processing, the starting position of synchronous codewords is derived by using the position information of the synchronous peak value in the data block. Compared with the original frequency domain synchronization scheme, the new scheme has the advantages of simpler design of synchronization head, better synchronization performance and reuse of SC-FDE system resources. It is very suitable for synchronization scheme of SC-FDE system. Finally, the whole SC-FDE system is divided into synchronous subsystem and FDE subsystem. After the two subsystems are completed, the whole system is designed jointly. The whole system adopts the improved frequency domain synchronization mode and the linear frequency domain equalization. The FFT resources are reused, and the FPGA resources are saved on the premise of ensuring the performance.
【学位授予单位】：北京邮电大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN791;TN929.5
本文编号：2429212
[Abstract]:With the increase of the transmission rate of communication system, the multipath effect of channel becomes more and more important. This paper focuses on the emerging SC-FDE system which can resist multipath effect in recent years. In this paper, we first study the characteristics of wireless multipath channel, and find that there is multipath effect in wireless channel, in which the transmission signal will be affected by inter-symbol interference (ISI). In order to overcome the multipath effect, the equalization technique is studied in this paper, and the time domain equalization and frequency domain equalization are compared and analyzed. It is found that the equalizer in time and frequency domain is similar in coefficient determination method and equalizer structure design. However, for high-speed communication systems, the time-domain equalizer algorithm is exponentially complex, which is not conducive to implementation; the frequency-domain equalizer algorithm is linear logarithmic complexity, which is easy to be implemented in digital systems. Because SC-FDE system is sensitive to timing frequency offset, a synchronization method suitable for SC-FDE system is designed in this paper. In this paper, we find that the performance of Park algorithm is better than that of SC and Minn algorithm, and the accuracy of synchronization is higher. At the same time, using CAZAC sequence as the training sequence of Park algorithm can improve the synchronization performance of the system. Eliminate the false peak of the original Park algorithm. In order to reuse the frequency domain processing resources in SC-FDE system, the frequency domain synchronization scheme is studied in this paper. It is found that frequency domain synchronization can be used when all synchronization information is included in a certain data block. In view of this discovery, a new frequency domain synchronization scheme is proposed in this paper. Based on frequency domain processing, the starting position of synchronous codewords is derived by using the position information of the synchronous peak value in the data block. Compared with the original frequency domain synchronization scheme, the new scheme has the advantages of simpler design of synchronization head, better synchronization performance and reuse of SC-FDE system resources. It is very suitable for synchronization scheme of SC-FDE system. Finally, the whole SC-FDE system is divided into synchronous subsystem and FDE subsystem. After the two subsystems are completed, the whole system is designed jointly. The whole system adopts the improved frequency domain synchronization mode and the linear frequency domain equalization. The FFT resources are reused, and the FPGA resources are saved on the premise of ensuring the performance.
【学位授予单位】：北京邮电大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN791;TN929.5
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