工作点驱动的模拟集成电路优化设计方法研究

发布时间：2019-02-23 21:46

【摘要】：随着集成电路的不断发展,目前已经到了系统芯片以及混合信号系统芯片的时代,而模拟集成电路的设计仍是制约电路设计效率的主要因素,提高其自动化设计水平的任务迫在眉睫。优化设计是实现模拟电路设计自动化的必然措施,本文探讨了采用工作点驱动的优化设计方法。传统的优化设计其设计变量都是电路中各器件的尺寸,而基于工作点驱动的方法是以电路直流工作点上一组独立的器件电压、电流作为设计变量。这种方法源于对手工设计过程的类比。由于改变了电路的设计空间,因此可方便地表达设计时对电路工作区域的约束(即约束方程),也可使设计变量与设计目标之间的映射关系(即目标函数)变得更为简单,有利于优化算法的收敛。同时,由于更接近于传统手工设计,可使设计者更好地理解设计过程与设计结果,也为优化过程结合传统设计经验提供了可能。实现工作点驱动的优化,要解决的首要问题是如何从器件的工作点电压、电流获得器件尺寸及各种电参数。对目前大多数情况下的小尺寸MOS工艺设计,简单的平方律模型无法满足精度要求,本文为此提出用模糊逻辑建模的方法来完成这一任务。先利用HSpice等电路模拟器中内置的高精度MOS模型获得一组样本数据,再应用T-S模糊逻辑系统建立器件尺寸与工作点电压电流之间的关系模型。T-S模拟逻辑系统具有适应性强、几乎不需迭代、便于应用等优点。在上述工作基础上,本文研究了MOS电路工作点驱动、基于遗传算法的多目标优化设计。多目标优化获得的Pareto前沿解允许设计者从一组相互冲突的设计指标中做出最佳选择,是解决电路最优设计的根本途径。但基于NSGA-II遗传算法的多目标优化需要很大的计算量,尤其是需要调用电路仿真器进行电路性能指标计算时。采用先建立单个晶体管小信号参数的BSIM3v3级数值模型,再进行基于方程优化的方法,这样可快速求得较准确的多目标最优解,大大减少了计算量。文章最后对两种常见的CMOS运放电路进行了优化设计,证明了本文所采用方法的有效性。
[Abstract]:With the continuous development of integrated circuits, it has come to the era of system chips and mixed signal system chips, and the design of analog integrated circuits is still the main factor that restricts the efficiency of circuit design. The task of improving the level of automation design is urgent. Optimal design is an inevitable measure to realize the automation of analog circuit design. The design variables of traditional optimization design are all the dimensions of each device in the circuit, and the method based on the working point drive is to take a group of independent device voltage and current on the DC operating point of the circuit as the design variables. This method derives from the analogy to the manual design process. By changing the design space of the circuit, it is easy to express the constraints on the working region of the circuit (i.e., the constraint equation), and to make the mapping relationship between the design variables and the design objective (i.e., the objective function) more simple. It is advantageous to the convergence of the optimization algorithm. At the same time, because it is closer to the traditional manual design, the designer can understand the design process and the design result better, and it also provides the possibility for the optimization process to combine with the traditional design experience. To realize the optimization of working point drive, the most important problem to be solved is how to obtain the device size and various electrical parameters from the working point voltage and current of the device. The simple square law model can not meet the precision requirement for the small size MOS process design at present. This paper proposes a fuzzy logic modeling method to accomplish this task. First, a set of sample data is obtained by using the high precision MOS model built into the circuit simulator such as HSpice. Then the T-S fuzzy logic system is used to establish the model of the relationship between the device size and the operating point voltage and current. The T-S simulation logic system has the advantages of strong adaptability, almost no need of iteration, and is easy to be applied. Based on the above work, the multi-objective optimization design of MOS circuit based on genetic algorithm is studied. The Pareto frontier solution obtained by multi-objective optimization allows the designer to make the best choice from a set of conflicting design indexes, which is the fundamental way to solve the optimal circuit design. However, the multi-objective optimization based on NSGA-II genetic algorithm requires a lot of computation, especially when the circuit simulator is called to calculate the circuit performance index. The BSIM3v3 numerical model of a single transistor with small signal parameters is established first, and then the method based on equation optimization is carried out. Thus, the more accurate multi-objective optimal solution can be obtained quickly, and the computational complexity is greatly reduced. Finally, two common CMOS operational amplifier circuits are optimized and the effectiveness of the proposed method is proved.
【学位授予单位】：杭州电子科技大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN402

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