快速中值滤波算法研究及其FPGA硬件实现
发布时间：2019-03-02 17:43
【摘要】：针对图像噪声大和对比度差特点,提出了一种水下图像快速中值滤波算法及FPGA硬件实现。通过分析中值滤波算法,以3×3窗口为数学模型,以CycloneⅢ EP3C40F324I7为核心处理芯片,用VHDL语言实现模型中所需要的模块,实现了快速中值滤波算法对图像的处理。通过硬件实验结果对比,系统达到了抑制噪声保持原图像的目的。该设计在水下图像处理中具有一定的工程参考及应用价值。
[Abstract]:In this paper, a fast median filtering algorithm and FPGA hardware implementation for underwater image are proposed according to the characteristics of high noise and poor contrast. By analyzing the median filtering algorithm, taking 3 脳 3 window as the mathematical model and Cyclone鈪，
本文编号：2433301
[Abstract]:In this paper, a fast median filtering algorithm and FPGA hardware implementation for underwater image are proposed according to the characteristics of high noise and poor contrast. By analyzing the median filtering algorithm, taking 3 脳 3 window as the mathematical model and Cyclone鈪，
本文编号：2433301
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