神经桥集成电路的设计

发布时间：2019-05-22 05:15

【摘要】：神经损伤与再生一直以来都是神经科学研究中的一项重要课题。目前,利用医学方法修复受损的神经系统,特别是受损的中枢神经系统,存在许多难以攻克的医学临床难题,随着神经科学与半导体学等其他学科的相互渗透,以及CMOS晶体管尺寸的越来越小,为在人体受损的神经处植入相应的芯片,完成神经信号的传输提供了可能。本文首先介绍神经信号的相关理论,包括神经元的结构和电学特点；然后介绍了用于采集和激励神经信号的电极种类,如植入式微电极和体表电极,并对几种常用的探测与激励神经信号的电路结构做了一些比较。本文设计的神经桥集成电路的核心电路是CMOS运算放大器,由于神经信号幅度微弱,随机性强,所以本文采用输入输出满摆幅的运算放大器作为系统电路的主运算放大器。本文在介绍模拟集成电路设计的流程,版图设计基础,多项目晶圆计划,模拟集成电路工艺和CMOS运算放大器的理论基础上,采用0.35μm CMOS工艺,设计了一种输入输出满摆幅、高性能运算放大器,后仿真结果显示该运算放大器在3.3V单电源电压供电下,开环增益为123.1dB,单位增益带宽为6.814MHz,相位裕度为82.21°,输入级跨导的变化维持在5.5%内,电源抑制比可以达到121.8dB,共模抑制比可以达到125.7dB。本文采用输入输出满摆幅高性能CMOS运算放大器,设计了一种电压激励方式的神经桥集成电路,该电路包括与神经电极相连的阻容耦合网络,前置仪表放大器,直流补偿电路,双T陷波网络和神经功能电激励电路。由于电容比电阻更加容易匹配,所以本文的神经功能电激励电路采用开关电容再放大电路。调节仪表放大器中的外置电阻的大小,调节系统电路的增益,后仿真结果显示电路增益59.7dB～119dB可调,3dB带宽大于9.5kHz,共模抑制比大于159.8dB,芯片尺寸0.88mm ×0.57mm.
[Abstract]:Nerve injury and regeneration have always been an important topic in neuroscience research. At present, the use of medical methods to repair the damaged nervous system, especially the damaged central nervous system, there are many difficult medical clinical problems, with the mutual penetration of neuroscience and semiconductor and other disciplines. And the size of CMOS transistor is getting smaller and smaller, which makes it possible to insert the corresponding chip into the damaged nerve of human body and complete the transmission of neural signal. In this paper, the related theories of neural signals are introduced, including the structure and electrical characteristics of neurons. Then the types of electrodes used to collect and excite neural signals, such as implantable microelectrodes and body surface electrodes, are introduced, and several common circuit structures for detecting and exciting neural signals are compared. The core circuit of the neural bridge integrated circuit designed in this paper is the CMOS operational amplifier. Because the amplitude of the neural signal is weak and the randomness is strong, the input and output full swing operational amplifier is used as the main operational amplifier of the system circuit. Based on the introduction of the process of analog integrated circuit design, the basis of layout design, multi-project wafer planning, analog integrated circuit technology and CMOS operational amplifier theory, a full swing of input and output is designed by using 0.35 渭 m CMOS process. The simulation results show that the open-loop gain is 123.1dB, the unit gain bandwidth is 6.814MHz, and the phase margin is 82.21 掳. The transconductivity of the input stage is maintained within 5.5%, the power rejection ratio can reach 121.8 dB, and the common mode rejection ratio can reach 125.7 dB. In this paper, a voltage excited neural bridge integrated circuit is designed by using an input / output full swing high performance CMOS operational amplifier. The circuit includes a resistance-capacitance coupling network connected to the nerve electrode, a preinstrument amplifier and a DC compensation circuit. Double T notch network and neural functional electric excitation circuit. Because the capacitance specific resistance is easier to match, the switched capacitor reamplifier circuit is used in the neural function electric excitation circuit in this paper. The external resistance in the instrument amplifier is adjusted and the gain of the system circuit is adjusted. The simulation results show that the gain of the circuit 59.7dB~119dB is adjustable, the 3dB bandwidth is more than 9.5kHz, the common-mode rejection ratio is more than 159.8dB, and the chip size 0.88mm 脳 0.57mm.
【学位授予单位】：东南大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN402

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