基于FPGA的DSP高速图像缓存硬件模块设计

发布时间：2019-06-19 15:48

【摘要】：折射率是液体的重要特性之一,它与溶液的浓度、色散和密度等存在密不可分的联系。在要利用临界角法测量硫酸溶液折射率的大背景下,本文阐述了基于FPGA的DSP高速图像缓存硬件模块的设计。在确定测量方案中的光学原理后,选取CMOS图像传感器图像采集工具,然后在图像的缓存与处理的中采用DSP(digital signal processor)+FPGA(Field Programmable Gate Array)的双处理器的核心构架,其图像缓存的速度达到了100Mhz,具有处理速度快,性能稳定和可靠性强等诸多优点。论文围绕了五个部分进行,第一个部分主要阐述了图像传感器以及DSP+FPGA的双处理器构架的选取然后确定具体选型方案;第二个部分是在项目要求的1.6V—3.2V前提下,设计出电源转换的解决方案,然后根据各个芯片运行要求的上电时序来实现顺序上电;第三个部分阐述了DSP和FPGA运行程序加载的相关硬件的存储设计,CMOS图像传感器和FPGA及DSP彼此之间高速图像数据缓存的存储模块设计,最后对JTAG接口进行微型化设计;第四个部分是围绕硬件电路的保护功能设计、各个芯片相接需要的电平转换设计、隔离设计以及PCB设计中的面临复杂的EMC问题的解决方案设计;第五部分是针对上述步骤后制成PCB板后,进行硬件测试,通过用万用表和示波器检测电路中的短路、断路及电源纹波特性等,最后通过软件和仿真器进一步检测硬件设计,最后结果证明基于FPGA的DSP图像缓存硬件模块设计成功。
[Abstract]:The refractive index is one of the important properties of the liquid, which is closely related to the concentration, dispersion and density of the solution. In order to measure the refractive index of sulfuric acid solution by the critical angle method, the design of the high-speed image cache hardware module based on FPGA is described in this paper. After the optical principle in the measurement scheme is determined, the CMOS image sensor image acquisition tool is selected, and then the core framework of the dual-processor of the DSP (digital signal processor) + FPGA (Field Programmable Gate Array) is adopted in the buffer and processing of the image, the speed of the image cache reaches 100 Mhz, and the method has the advantages of high processing speed, And has the advantages of stable performance, strong reliability and the like. In the first part, the selection of the dual processor architecture of the image sensor and the DSP + FPGA is introduced, and the specific type selection scheme is determined. The second part is the solution to design the power conversion under the premise of the requirement of 1.6 V and 3.2 V of the project. and then the sequential power-on is realized according to the required power-up timing of the operation requirements of each chip, the third part expounds the storage design of the related hardware loaded by the DSP and the FPGA running program, the CMOS image sensor and the FPGA and the storage module design of the high-speed image data cache of the DSP and the DSP, The fourth part is the protection function design around the hardware circuit, the level conversion design required for each chip, the isolation design and the solution design of the complex EMC problem in the PCB design; in the fifth part, after the PCB board is manufactured after the step, the hardware test is carried out, the short circuit, the open circuit, the power supply ripple characteristic and the like in the circuit are detected by a multimeter and an oscilloscope, and finally the hardware design is further detected by the software and the simulator, Finally, the design of the DSP image cache hardware module based on FPGA is proved to be successful.
【学位授予单位】：华中科技大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN791;TP333

【参考文献】