综合校时模块的设计与实现
发布时间：2018-07-16 09:15
【摘要】：综合校时模块是我公司自行研制的通信设备上一个时间校正模块，具有一套相对独立的电路，其作用是是利用GPS卫星授时系统和短波授时系统获得准确的时间。 本文首先对GPS授时原理和短波授时原理进行了阐述，着重介绍了短波授时技术，介绍了短波时号的组成特点，同时分析了短波时码信号传输的弱点，介绍了短波时码接收的设备，并描述了短波授时实现的方法。 然后介绍了综合校时模块的具体指标参数，定下了模块的方案，决定模块分为短波接收机、GPS接收机和信号处理板3部分。接下来分别描述了3部分的方案，设计出了各部分的工作流程。 接下来重点讲述了信号处理板实现，，介绍了信号处理板的硬件组成，介绍了信号处理板的具体软件设计。包括了GPS功能实现软件工作流程和短波校时功能实现的软件工作流程，以及校时综合模块内外部的具体接口协议及实现。 由于晶体振荡器频率具有温漂特性和工程中容易被干扰的特点，本文还提出了一种时钟芯片的频率校正方法。该方法根据时钟芯片自身的电路特点，利用FPGA和单片机计算时钟芯片频率偏移，通过增加或减少脉冲对其进行补偿，达到频率校正目的，确保时钟芯片的守时精度。将该方法运用到实际的工程运用中后，获得较好的效果。为以后时钟芯片的频率校正的工程实现提供了一个有力的参考。 最后介绍了模块的测试方法，给出了模块测试的原理框图，并具体对每个指标进行了测试。该模块目前通过的验收测试，并应用于通信设备上，工作状况良好。
[Abstract]:The integrated time correction module is a time correction module of communication equipment developed by our company. It has a set of relatively independent circuits. Its function is to obtain accurate time by using GPS satellite time service system and short wave time service system. In this paper, the principle of GPS time service and the principle of shortwave time service are introduced, and the short wave time service technology is introduced, and the characteristics of the short wave time signal are introduced. At the same time, the weakness of the short wave time code signal transmission is analyzed. This paper introduces the equipment of short wave time code receiving, and describes the method of short wave time service. Then the specific index parameters of the integrated timing module are introduced and the scheme of the module is determined. The module is divided into three parts: the short wave receiver GPS receiver and the signal processing board. Then, three parts of the scheme are described, and the workflow of each part is designed. Then the realization of the signal processing board is introduced, the hardware structure of the signal processing board is introduced, and the software design of the signal processing board is introduced. It includes the software workflow of GPS function realization and the software workflow of short wave timing function realization, as well as the concrete interface protocol and realization of the internal and external interface of the timing synthesis module. Because the frequency of crystal oscillator has the characteristic of temperature drift and easy to be interfered in engineering, a frequency correction method for clock chip is also presented in this paper. According to the circuit characteristics of the clock chip, the frequency offset of the clock chip is calculated by using FPGA and single chip microcomputer, and the frequency correction is achieved by adding or reducing the pulse to ensure the timing accuracy of the clock chip. The method is applied to practical engineering, and good results are obtained. It provides a powerful reference for the realization of frequency correction of clock chip. Finally, the testing method of the module is introduced, the principle diagram of the module test is given, and each index is tested. The module has passed the acceptance test and has been applied to the communication equipment in good working condition.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：P228.4
本文编号：2125928
[Abstract]:The integrated time correction module is a time correction module of communication equipment developed by our company. It has a set of relatively independent circuits. Its function is to obtain accurate time by using GPS satellite time service system and short wave time service system. In this paper, the principle of GPS time service and the principle of shortwave time service are introduced, and the short wave time service technology is introduced, and the characteristics of the short wave time signal are introduced. At the same time, the weakness of the short wave time code signal transmission is analyzed. This paper introduces the equipment of short wave time code receiving, and describes the method of short wave time service. Then the specific index parameters of the integrated timing module are introduced and the scheme of the module is determined. The module is divided into three parts: the short wave receiver GPS receiver and the signal processing board. Then, three parts of the scheme are described, and the workflow of each part is designed. Then the realization of the signal processing board is introduced, the hardware structure of the signal processing board is introduced, and the software design of the signal processing board is introduced. It includes the software workflow of GPS function realization and the software workflow of short wave timing function realization, as well as the concrete interface protocol and realization of the internal and external interface of the timing synthesis module. Because the frequency of crystal oscillator has the characteristic of temperature drift and easy to be interfered in engineering, a frequency correction method for clock chip is also presented in this paper. According to the circuit characteristics of the clock chip, the frequency offset of the clock chip is calculated by using FPGA and single chip microcomputer, and the frequency correction is achieved by adding or reducing the pulse to ensure the timing accuracy of the clock chip. The method is applied to practical engineering, and good results are obtained. It provides a powerful reference for the realization of frequency correction of clock chip. Finally, the testing method of the module is introduced, the principle diagram of the module test is given, and each index is tested. The module has passed the acceptance test and has been applied to the communication equipment in good working condition.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：P228.4
【参考文献】
相关期刊论文 前5条
1 张晓健 ,徐菁;用单片机控制I~2C器件[J];电子世界;2003年08期
2 孙雷;短波在无线电通信中的作用及特点[J];信息技术;2005年05期
3 李永泉,高成发;北斗卫星导航定位系统简介[J];江苏测绘;2001年04期
4 李建中,李金宝,石胜飞;传感器网络及其数据管理的概念、问题与进展[J];软件学报;2003年10期
5 王久鹏;尚春阳;;一种基于GPS的校时系统[J];现代电子技术;2008年13期
本文编号：2125928
本文链接：https://www.wllwen.com/kejilunwen/dizhicehuilunwen/2125928.html
