时差定位算法及授时信息传输实现研究

发布时间：2019-01-14 16:46

【摘要】：随着全球电子信息技术的发展越来越迅猛， GPS（Global Position Systems）技术日益成熟，为无源时差估计提供了很好的实现平台。由于无源时差定位技术在许多性能上明显优于有源定位技术，所以无源时差定位技术受到越来越高的重视，成为国内外众多学者重点研究对象。本文围绕着如何实现无源时差定位系统展开了深入研究。首先对无源时差估计和无源时差定位算法进行了理论介绍，针对不同仿真环境进行了大量的Matlab仿真研究，并通过仿真结果，从均值及均方误差对算法进行了比较分析，最后讨论联合时延估计算法和联合时差定位算法。Matlab仿真结果表明，联合时延估计算法加快了算法收敛速度，并大大减少了EDTE的滤波器阶数，有利于工程实现；联合时差定位算法提高了定位精度，并且在即使TDOA误差较大时，也可以很准确估算出目标位置，同时避免了算法的不收敛性。然后本文对如何实现无源时差定位系统做了详细介绍。首先，对无源时差定位系统的总体实现框架进行了详细阐述。信号被数字板接收后，通过GSP打时间戳的方式产生精确授时数据并传送给DSP，DSP对数据进行接收、解析、打包后发送给上位机，，最后上位机利用收到的精确授时数据进行时差估计及定位。无源时差定位系统的通信机制十分关键，然后本文对数据的通信机制也做了详细描述。DSP作为FPGA与上位机的通信枢纽，起着非常重要的桥梁作用，因而最后本文介绍了在精确授时模式下DSP是如何通过多线程程序机制实现多任务的并发执行，维护着整个系统有条不紊的工作。最后对无源时差定位系统进行了联调测试，并通过调试软件对数据进行了比较分析。实验结果表明：系统的数据通信机制、DSP的多线程程序机制都能正常运行；当系统采用同源时钟，真实时延为0ns时，对通过信号源产生的调制中频信号进行时延估计，能够得到误差小于100ns的精确时延估计结果。
[Abstract]:With the development of global electronic information technology, GPS (Global Position Systems) technology is becoming more and more mature, which provides a good platform for passive time difference estimation. Because the passive time difference location technology is obviously superior to the active location technology in many aspects, the passive time difference location technology has been paid more and more attention, and has become the focus of many scholars at home and abroad. This paper focuses on how to realize passive time difference location system. Firstly, the passive time difference estimation and passive time difference location algorithm are introduced theoretically, and a large number of Matlab simulation studies are carried out for different simulation environments. Through the simulation results, the algorithm is compared and analyzed from the mean value and mean square error. Finally, the joint time delay estimation algorithm and joint time difference location algorithm are discussed. The Matlab simulation results show that the joint time delay estimation algorithm accelerates the convergence speed of the algorithm and greatly reduces the filter order of EDTE, which is beneficial to engineering implementation. Joint time difference (JTD) localization algorithm improves the location accuracy, and can estimate the target position accurately even when the TDOA error is large, while avoiding the non-convergence of the algorithm. Then this paper introduces how to realize passive time difference location system in detail. Firstly, the overall implementation framework of passive time difference location system is described in detail. After the signal is received by the digital board, the accurate timing data is generated by GSP timestamp and transmitted to the DSP,DSP to receive, parse, package and send to the host computer. Finally, the upper computer uses the received accurate timing data to estimate and locate the time difference. The communication mechanism of passive time difference location system is very important, and then the communication mechanism of data is described in detail. As a communication hub between FPGA and host computer, DSP plays a very important role as a bridge. In the end, this paper introduces how DSP implements multitasking concurrent execution through multithreading program mechanism in precise timing mode, and maintains the systematic work of the whole system. Finally, the passive time difference positioning system is tested, and the data is compared and analyzed by debugging software. The experimental results show that the data communication mechanism of the system and the multithreaded program mechanism of DSP can all work normally. When the system adopts the homologous clock and the real time delay is 0ns, the delay estimation of the modulation intermediate frequency signal generated by the signal source can obtain the accurate time delay estimation results with an error less than that of the 100ns.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：P228.4

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