面向新型三维闪存的嵌入式存储系统优化方法研究

发布时间：2018-03-18 03:09

本文选题：三维闪存　切入点：电荷撷取　出处：《深圳大学》2017年硕士论文　论文类型：学位论文

【摘要】：三维闪存作为主流存储介质,广泛运用于企业级高性能计算机和嵌入式系统。但是由于访问辅助存储介质的存储原语没有发生改变,存储原语强迫三维闪存这类存储介质的存储方式必须和磁盘这一类的块设备[11][12][13][14]保持相同的存储方式。最近,一些学者针对非易失性存储器提出了新的存储原语,他们试图研究新的存储原语在非易失性存储器的潜在价值。虽然新的存储原语通过虚拟地址到逻辑地址的地址映射来有效的减少访问存储器的时间,但是这些新的存储原语仍然存在问题:首先,这些新的存储原语需要内存存储大量的虚拟地址到逻辑地址的地址映射;其次,当数据更新时,存储原语需要额外的支持。额外的支持不仅包括读写操作等,还包括三维闪存存储空间。额外的支持会导致访问三维闪存的时间增加,同时使得三维闪存存储空间利用率降低。相对于二维闪存,三维闪存具有存储容量大、编程干扰少、访问延迟低等特点。不同于传统的二维闪存制作工艺相比,三维闪存采用电荷撷取机制。然而,制作三维闪存的现有工艺不能保证多个闪存在堆叠时实现完美的垂直插入,特别是在20纳米以下的制程。制程变异会导致电子分布不均匀,并会导致三维闪存存储的数据不完整及可靠性降低。本文针对三维闪存现存的这两个突出问题展开研究。首先,本文提出一种名为ESP的优化方案。该优化方案将新提出的存储原语与虚拟化结合,来优化三维闪存存储系统。我们提出了两种策略:策略一是虚拟复制;策略二是地址映射预取。这两种策略将有效解决新兴存储原语运用到三维闪存时所存在的问题。这两种策略主要降低访问三维闪存的时间,同时确保内存中的地址映射可以很好地被应用。我们将ESP优化方案运用到嵌入式开发平台中,评估ESP了优化方案。实验结果显示ESP优化方案可以有效地提高三维闪存的读/写操作性能,并降低30%的垃圾回收操作。其次,本文提出了名为P-Alloc的优化方案。该优化方案解决制程变异所带来的数据可靠性低的问题。P-Alloc优化方案分别从三维闪存硬件本身和闪存存储系统的系统架构提供支持,有针对性地为数据分配存储空间。P-Alloc优化方案预测三维闪存物理块的存储性能,并试图将关键数据分配给相对可靠的物理块中。P-Alloc优化方案也采用基于硬件的电压阈值变化,进一步提高三维闪存存储数据的可靠性。我们将P-Alloc优化方案运用于各种实际的工作负载,证明其优化的可行性。我们的实验结果显示,相较于基准实验,P-Alloc优化方案可以提高三维闪存存储数据的可靠性,并降低访问三维闪存的延迟。
[Abstract]:As the mainstream storage medium, 3D flash memory is widely used in enterprise-class high-performance computers and embedded systems. Storage primitives such as 3D flash memory must be stored in the same way as block devices such as disks [11] [12] [13] [14]. Recently, some scholars have proposed new storage primitives for nonvolatile memory. They try to study the potential value of new storage primitives in nonvolatile memory. Although the new storage primitives effectively reduce access time by mapping virtual addresses to logical addresses, However, these new storage primitives still have problems: first, these new storage primitives require memory storage of a large number of virtual address to logical address address mapping; second, when the data is updated, Additional support is required for storage primitives. Additional support includes not only read and write operations, but also 3D flash storage space. Additional support results in increased access time to 3D flash memory. At the same time, the utilization ratio of 3D flash memory is reduced. Compared with 2D flash memory, 3D flash memory has the characteristics of large storage capacity, less programming interference and low access delay. 3D flash memory uses a charge capture mechanism. However, the existing process for making 3D flash memory does not guarantee the perfect vertical insertion of multiple flash memories when stacked, especially in processes below 20 nanometers. Process variations can lead to uneven electron distribution. And will lead to 3D flash storage data incomplete and reduced reliability. This paper focuses on the existing 3D flash memory of these two outstanding problems. First of all, This paper presents an optimization scheme called ESP, which combines the new storage primitives with virtualization to optimize the 3D flash storage system. We propose two strategies: one is virtual replication; The second strategy is address mapping prefetching. These two strategies will effectively solve the problems existing in the application of new storage primitives to 3D flash memory. These two strategies mainly reduce the time to access 3D flash memory. At the same time, we make sure that the address mapping in memory can be well applied. We apply the ESP optimization scheme to embedded development platform. The experimental results show that the ESP optimization scheme can effectively improve the read / write performance of 3D flash memory and reduce the garbage collection operation by 30%. This paper presents an optimization scheme called P-Alloc, which solves the problem of low data reliability caused by process variation. The optimization scheme is supported by the 3D flash memory hardware itself and the system architecture of the flash storage system, respectively. The optimized scheme of allocating storage space to data. P-Alloc optimizes the storage performance of 3D flash physical block, and attempts to assign key data to the relatively reliable physical block. P-Alloc optimization scheme also adopts the change of voltage threshold based on hardware. Further improve the reliability of 3D flash storage data. We apply P-Alloc optimization scheme to various actual workloads to prove the feasibility of the optimization. Our experimental results show that, Compared with the benchmark experiment, the P-Alloc optimization scheme can improve the reliability of 3D flash storage data and reduce the delay of accessing 3D flash memory.
【学位授予单位】：深圳大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TP333

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