图像增强在FPGA上的高性能实现

发布时间：2018-04-28 12:33

本文选题：FPGA + 图像增强　；参考：《中国科学院研究生院(光电技术研究所)》2016年硕士论文

【摘要】：目前,图像处理已应用与人们生活的各个方面,如医学、交通、航天、工业控制等。其重要性源于两个主要应用领域:改善图像的信息以便人们解释;为存储、传输和表示而对图像数据进行处理,以便于机器自动理解。图像增强一般是作用于图像的预处理阶段,它不考虑引起图像退化的原因,面向于特定用途,突出感兴趣的部分,抑制不关心的部分,对接收到的图像加以处理,以便于后期的理解和分析。在这一阶段一个显著的特点是算法本身比较简单,但数据量巨大。如何在有效的时间内处理完大量的数据成为一个棘手的问题,尤其是在诸如交通、军事、航天等对实时性要求较高的领域。FPGA作为一种可编程的硬件,为图像的实时处理提供了一种有效的解决方案,它兼具DSP的灵活性与专用集成电路的高速性。本文的主要工作就是研究如何在FPGA上实现高速的图像处理,论文的工作重点在于电路结构的设计而非算法本身的研究。本文首先介绍了FPGA的芯片结构,以及面向硬件的设计思维,这是实现高性能FPGA开发的关键所在。然后通过分析算法本身的特点,重点设计实现了中值滤波、直方图均衡化、二维快速傅立叶变换三个模块,并实现了图像在频域的实时处理,填补了这一领域的不足。特别的,关于中值滤波,本文充分利用硬件电路的二进制特性,设计了一种按位生成中值的电路结构,从根本上避免了比较运算,在节约资源消耗的同时提高了处理速度。在直方图均衡化电路中,采用外部存储器DDR3 SDRAM缓存图像,内部采用乒乓处理结构,实现了大尺寸、高帧频图像的实时处理。本文所设计的电路模块均给出了相应的资源消耗及可达到的处理速度,并在文中给出了图像处理的实际效果图。在设计电路结构时也充分考虑到了其实用性及可移植性,每个电路模块可方便的移植到其他系统中,且在调用时可通过修改接口参数使其满足不同大小及像素位宽的图像的处理要求,具有一定的灵活性与工程实用性。
[Abstract]:At present, image processing has been applied to all aspects of human life, such as medicine, transportation, aerospace, industrial control and so on. Its importance stems from two main applications: improving the information of images for interpretation; processing image data for storage, transmission and presentation, so that the machine can understand them automatically. Image enhancement is generally used in the preprocessing stage of an image. It does not take into account the causes of image degradation, it is oriented to specific purposes, highlights the part of interest, suppresses the part of interest, and processes the received image. To facilitate later understanding and analysis. A notable feature in this phase is that the algorithm itself is simple, but the amount of data is huge. How to deal with a large amount of data in an effective time has become a thorny problem, especially in fields such as transportation, military, aerospace and so on. FPGA is a kind of programmable hardware. It provides an effective solution for real-time image processing, which combines the flexibility of DSP and the high speed of ASIC. The main work of this paper is to study how to realize high-speed image processing on FPGA. The emphasis of this paper is on the design of circuit structure rather than on the algorithm itself. This paper first introduces the chip structure of FPGA and the hardware-oriented design thinking, which is the key to realize the development of high performance FPGA. Then, by analyzing the characteristics of the algorithm, three modules of median filter, histogram equalization and two-dimensional fast Fourier transform are designed and implemented, and the real-time processing of image in frequency domain is realized, which fills up the deficiency in this field. In particular, regarding median filter, this paper makes full use of the binary characteristic of hardware circuit, designs a circuit structure that generates the median value by bit, avoids the comparison operation fundamentally, and improves the processing speed while saving the resource consumption. In the histogram equalization circuit, the external memory DDR3 SDRAM is used to cache the image, and the internal ping-pong processing structure is used to realize the real-time processing of large size and high frame rate images. The circuit modules designed in this paper have given the corresponding resource consumption and the achievable processing speed, and the actual effect diagram of the image processing is given in this paper. The practicability and portability of the circuit are also taken into account when designing the circuit structure. Each circuit module can be easily transplanted to other systems. The interface parameters can be changed to meet the requirements of image processing with different size and pixel bit width, so it has some flexibility and engineering practicability.
【学位授予单位】：中国科学院研究生院(光电技术研究所)
【学位级别】：硕士
【学位授予年份】：2016
【分类号】：TP391.41

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