MXXXX DSP编译器关键技术设计与实现
发布时间：2018-10-13 16:58
【摘要】：随着数字处理芯片(Digital Signal Processor,DSP)在航空、航天、雷达、声纳、通信以及家用电器等各个领域的应用,DSP设计技术得到业界广泛关注。在过去十多年里,国内DSP设计技术发展迅速,而近年来业界对自主知识产权DSP设计技术需要尤为迫切。MXXXX DSP是由国防科学技术大学研发的具有自主知识产权的DSP,面向高性能计算、无线通信以及视频图像处理等应用领域[1]。MXXXX DSP的体系结构和指令集具有自主知识产权,因此为了支持其应用推广,必须为其开发一套完整的软件工具链系统。软件工具链中最重要的就是编译器,编译器的性能直接影响着处理器特别是VLIW体系结构处理器性能的发挥,因此针对MXXXX DSP体系结构研发一款支持其体系结构、指令集,并能够充分发挥其性能的编译器非常必要。课题组基于GCC平台开发MXXXX DSP编译器。本文基于MXXXX DSP的特点,为提高编译器的编译性能,主要做了以下工作:1.设计并实现了32位字符及字符串的支持方法:MXXXX DSP专注于高性能数字信号处理,对于单字节和双字节类型的数据使用较少,未提供单字节和双字节的访存指令。针对这个问题,论文在MXXXX DSP编译器中设计并实现了32位字符及字符串的支持方法,在不降低性能的情况下提供了对低位宽的数据支持。2.提出并实现了平行运算单元的管理分配算法:MXXXX DSP为了提高程序的执行效率,采用了多运算单元并发执行。GCC只支持通过操作数类型来选择运算单元,因此无法实现指令在平行单元上的合理分配。针对这个问题,论文设计并实现了了平行运算单元的管理分配算法,有效地解决了指令间在平行功能单元上分配的问题,提高了MXXXX DSP程序执行效率。3.设计并实现了基于循环的延迟槽调度算法:MXXXX DSP支持指令流水执行。由于MXXXX DSP的跳转指令有6个时钟周期的延时,循环指令在流水执行时,跳转指令的延迟槽填充问题成为影响循环程序执行效率的重要因素。本文针对该问题,结合MXXXX DSP的指令集特点,提出了基于循环的延迟槽调度算法。从而实现了对分支跳转延迟槽的有效填充,显著提高了循环程序的执行效率。
[Abstract]:With the application of digital processing chip (Digital Signal Processor,DSP) in aviation, aerospace, radar, sonar, communication and household appliances, DSP design technology has been widely concerned. In the past ten years, the DSP design technology has developed rapidly in China. In recent years, the DSP design technology of independent intellectual property is especially urgent for. MXXXX DSP, which is developed by the National University of National Defense Science and Technology, which is DSP, with independent intellectual property for high-performance computing. The architecture and instruction set of. MXXXX DSP in wireless communication and video image processing have their own intellectual property rights. In order to support its application and popularization, we must develop a complete software tool chain system for it. The most important thing in the software tool chain is the compiler. The performance of the compiler directly affects the performance of the processor, especially the VLIW architecture processor. Therefore, a instruction set is developed to support the architecture of the MXXXX DSP architecture. And the ability to give full play to its performance of the compiler is very necessary. We develop a MXXXX DSP compiler based on GCC platform. This paper based on the characteristics of MXXXX DSP, in order to improve compiler compilation performance, mainly do the following work: 1. The supporting method of 32-bit characters and strings is designed and implemented.: MXXXX DSP focuses on high performance digital signal processing. It uses less single-byte and double-byte data, and does not provide single-byte and double-byte memory access instructions. In order to solve this problem, this paper designs and implements a 32-bit character and string support method in MXXXX DSP compiler. In order to improve the efficiency of program execution, a management and allocation algorithm for parallel computing units (: MXXXX DSP) is proposed and implemented. In order to improve the efficiency of program execution, multi-unit concurrent execution is adopted. GCC only supports the selection of operation units by optograph type. Therefore, the reasonable distribution of instructions on parallel units cannot be realized. In order to solve this problem, this paper designs and implements a management and allocation algorithm for parallel computing units, which effectively solves the problem of assignment between instructions on parallel functional units and improves the efficiency of MXXXX DSP program execution. A cyclic delay slot scheduling algorithm (: MXXXX DSP) is designed and implemented to support instruction pipeline execution. Due to the delay of six clock cycles in the jump instruction of MXXXX DSP, the delay slot filling problem becomes an important factor to affect the efficiency of loop program execution when the loop instruction is executed in pipelining. Considering the characteristics of MXXXX DSP instruction set, a cyclic delay slot scheduling algorithm is proposed in this paper. Thus, the effective filling of the branch hopping delay slot is realized, and the execution efficiency of the loop program is improved significantly.
【学位授予单位】：国防科学技术大学
【学位级别】：硕士
【学位授予年份】：2016
【分类号】：TP314
本文编号：2269315
[Abstract]:With the application of digital processing chip (Digital Signal Processor,DSP) in aviation, aerospace, radar, sonar, communication and household appliances, DSP design technology has been widely concerned. In the past ten years, the DSP design technology has developed rapidly in China. In recent years, the DSP design technology of independent intellectual property is especially urgent for. MXXXX DSP, which is developed by the National University of National Defense Science and Technology, which is DSP, with independent intellectual property for high-performance computing. The architecture and instruction set of. MXXXX DSP in wireless communication and video image processing have their own intellectual property rights. In order to support its application and popularization, we must develop a complete software tool chain system for it. The most important thing in the software tool chain is the compiler. The performance of the compiler directly affects the performance of the processor, especially the VLIW architecture processor. Therefore, a instruction set is developed to support the architecture of the MXXXX DSP architecture. And the ability to give full play to its performance of the compiler is very necessary. We develop a MXXXX DSP compiler based on GCC platform. This paper based on the characteristics of MXXXX DSP, in order to improve compiler compilation performance, mainly do the following work: 1. The supporting method of 32-bit characters and strings is designed and implemented.: MXXXX DSP focuses on high performance digital signal processing. It uses less single-byte and double-byte data, and does not provide single-byte and double-byte memory access instructions. In order to solve this problem, this paper designs and implements a 32-bit character and string support method in MXXXX DSP compiler. In order to improve the efficiency of program execution, a management and allocation algorithm for parallel computing units (: MXXXX DSP) is proposed and implemented. In order to improve the efficiency of program execution, multi-unit concurrent execution is adopted. GCC only supports the selection of operation units by optograph type. Therefore, the reasonable distribution of instructions on parallel units cannot be realized. In order to solve this problem, this paper designs and implements a management and allocation algorithm for parallel computing units, which effectively solves the problem of assignment between instructions on parallel functional units and improves the efficiency of MXXXX DSP program execution. A cyclic delay slot scheduling algorithm (: MXXXX DSP) is designed and implemented to support instruction pipeline execution. Due to the delay of six clock cycles in the jump instruction of MXXXX DSP, the delay slot filling problem becomes an important factor to affect the efficiency of loop program execution when the loop instruction is executed in pipelining. Considering the characteristics of MXXXX DSP instruction set, a cyclic delay slot scheduling algorithm is proposed in this paper. Thus, the effective filling of the branch hopping delay slot is realized, and the execution efficiency of the loop program is improved significantly.
【学位授予单位】：国防科学技术大学
【学位级别】：硕士
【学位授予年份】：2016
【分类号】：TP314
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