基于FPGA的实时图像矫正系统设计
发布时间：2019-05-09 16:36
【摘要】：由光学镜头透视引起的非线性畸变失真问题给众多对图像质量有较高精度要求的领域造成了重大困扰,本文针对图像畸变问题设计了一种基于FPGA的实时图像矫正系统,并围绕降低FPGA的片上内存消耗和提高行缓存读写效率展开研究,其在医学图像、航空遥感、视频安防监控、倒车影像、多摄像头系统等诸多领域都具有重要的应用价值和应用前景。本文的主要工作和创新有以下几点:1、根据镜头畸变失真的连续性,本文提出了坐标LUT的16点插值法,将16×16格点内所有像素的反向映射坐标由其四角上的像素坐标通过双线性插值算法构造出来,该方法可显著压缩LUT的内存消耗。2、行缓存因视频图像的实时性而难以被压缩,本文提出了基于读扩展的环形行缓存读写算法,使图像上映射和下映射共用一片内存空间,并利用行同步信号的消隐间隔扩展读周期,使读写指针循序错开,保证上下映射的空间以完成正确的反向映射。相比传统的以最大偏移作为行缓存的结构,改进的专用控制算法可以减少近50%的内存消耗。3、为了提高行缓存的读写效率,系统还引入了基于Block-RAM结构的行缓存,在一个像素时钟内通过读地址的奇偶性规则可同时从四个BRAM中读取双钱性插值窗四角的像素值。本文设计的实时图像矫正系统已经在单片FPGA内实现,实验结果表明所提出的LUT压缩方法和读扩展行缓存算法显著地改善了内存消耗,同时获得了较好的实时图像矫正效果。
[Abstract]:The nonlinear distortion caused by optical lens perspective has caused great problems in many fields that have high precision requirements for image quality. In this paper, a real-time image correction system based on FPGA is designed to solve the image distortion problem. It also focuses on reducing the on-chip memory consumption of FPGA and improving the reading and writing efficiency of line cache. It is used in medical image, aerial remote sensing, video security monitoring and reverse image. Many fields such as multi-camera system have important application value and application prospect. The main work and innovation of this paper are as follows: 1. According to the continuity of lens distortion and distortion, the 16:00 interpolation method of coordinate LUT is proposed in this paper. The reverse mapping coordinates of all pixels in 16 脳 16 lattice points are constructed by bilinear interpolation algorithm from the pixel coordinates on their four corners. This method can significantly compress the memory consumption of LUT. 2, row cache is difficult to be compressed because of the real-time performance of video images. In this paper, a ring line cache reading and writing algorithm based on read extension is proposed, which makes the mapping on the image share a piece of memory space, and extends the reading period by using the blanking interval of the line synchronization signal, so that the read and write pointer is staggered in sequence. Ensure the upper and lower mapping space to complete the correct reverse mapping. Compared with the traditional structure with maximum offset as row cache, the improved special control algorithm can reduce memory consumption by nearly 50%. 3. In order to improve the reading and writing efficiency of row cache, the system also introduces row cache based on Block-RAM structure. The pixel values of the four corners of the double money interpolation window can be read from four BRAM at the same time by reading the parity rule of the address in a pixel clock. The real-time image correction system designed in this paper has been implemented in a single FPGA. The experimental results show that the proposed LUT compression method and read extended line cache algorithm can significantly improve the memory consumption, and obtain a good real-time image correction effect.
【学位授予单位】：浙江大学
【学位级别】：硕士
【学位授予年份】：2016
【分类号】：TP391.41
本文编号：2472921
[Abstract]:The nonlinear distortion caused by optical lens perspective has caused great problems in many fields that have high precision requirements for image quality. In this paper, a real-time image correction system based on FPGA is designed to solve the image distortion problem. It also focuses on reducing the on-chip memory consumption of FPGA and improving the reading and writing efficiency of line cache. It is used in medical image, aerial remote sensing, video security monitoring and reverse image. Many fields such as multi-camera system have important application value and application prospect. The main work and innovation of this paper are as follows: 1. According to the continuity of lens distortion and distortion, the 16:00 interpolation method of coordinate LUT is proposed in this paper. The reverse mapping coordinates of all pixels in 16 脳 16 lattice points are constructed by bilinear interpolation algorithm from the pixel coordinates on their four corners. This method can significantly compress the memory consumption of LUT. 2, row cache is difficult to be compressed because of the real-time performance of video images. In this paper, a ring line cache reading and writing algorithm based on read extension is proposed, which makes the mapping on the image share a piece of memory space, and extends the reading period by using the blanking interval of the line synchronization signal, so that the read and write pointer is staggered in sequence. Ensure the upper and lower mapping space to complete the correct reverse mapping. Compared with the traditional structure with maximum offset as row cache, the improved special control algorithm can reduce memory consumption by nearly 50%. 3. In order to improve the reading and writing efficiency of row cache, the system also introduces row cache based on Block-RAM structure. The pixel values of the four corners of the double money interpolation window can be read from four BRAM at the same time by reading the parity rule of the address in a pixel clock. The real-time image correction system designed in this paper has been implemented in a single FPGA. The experimental results show that the proposed LUT compression method and read extended line cache algorithm can significantly improve the memory consumption, and obtain a good real-time image correction effect.
【学位授予单位】：浙江大学
【学位级别】：硕士
【学位授予年份】：2016
【分类号】：TP391.41
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