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UHF RFID阅读器接收机研究与设计

发布时间:2019-06-27 13:23
【摘要】:本文提出了一种满足多种协议要求的UHF RFID阅读器接收机,包括:射频前端和模拟基带。基于0.18μm SiGeBiCMOS工艺,完成了接收机射频前端以及模拟基带中各模块电路的分析与设计、版图设计以及后仿真,主要成果如下:(1)通过文献调研,了解UHF RFID阅读器目前的发展和研究状况。介绍了常见的几种协议标准,包括:EPCGlobalC1G2、ISO/IEC18000-6C、美国FCC、欧洲ETSI以及我国关于射频识别技术应用规定。根据协议标准制定了系统指标。(2)分析了经典的接收机结构及其优点和不足。本文选择结构简单,利于集成的直接变频接收机结构。(3)载波泄漏是UHF RFID阅读器接收机设计的难点。本文分析了载波泄漏对接收机性能的影响,并提出了一种反馈式载波抵消射频接收前端。分析了射频前端的环路稳定性、噪声性能、线性度等关键指标。完成了各模块的电路分析与设计。仿真结果显示,在读写模式下,射频前端的P1dB:-21.74dBm,噪声系数:22.57dB,功耗:145.4mW;在监听模式下,射频前端的P1dB:-22.45dBm,噪声系数:11dB,功耗:70.88mW。(4)完成了模拟基带电路的分析与设计。模拟基带电路包括:前置放大器、八阶Butterworth低通滤波器、自动频率校准电路和直流偏移消除电路。仿真结果显示,模拟基带的增益范围:10~70dB,步长为10dB;可实现四种截止频率:250kHz、600kHz、1MHz、1.35MHz,在AFT电路协助下频率偏差小于10%;在二倍频处衰减度可达到40dB左右;总功耗29.568mW。
[Abstract]:In this paper, a UHF RFID reader receiver is proposed to meet the requirements of many protocols, including RF front-end and analog baseband. Based on 0.18 渭 m SiGeBiCMOS process, the analysis and design of RF front-end and analog baseband module circuit, layout design and post-simulation are completed. The main results are as follows: (1) through literature investigation, we can understand the current development and research status of UHF RFID reader. This paper introduces several common protocol standards, including EPCGlobalC1G2,ISO/IEC18000-6C, FCC, European ETSI and the application regulations of RFID technology in China. According to the protocol standard, the system index is established. (2) the classical receiver structure and its advantages and disadvantages are analyzed. In this paper, the structure of direct frequency conversion receiver is selected, which is simple in structure and convenient for integration. (3) Carrier leakage is a difficult point in the design of UHF RFID reader receiver. In this paper, the influence of carrier leakage on receiver performance is analyzed, and a feedback carrier cancellation RF receiver front end is proposed. The key indexes such as loop stability, noise performance and linearity of RF front end are analyzed. The circuit analysis and design of each module are completed. The simulation results show that in read and write mode, the P1dB 鈮,

本文编号:2506827

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