数字阵列雷达信号处理机设计与实现

发布时间：2017-12-27 21:30

  本文关键词：数字阵列雷达信号处理机设计与实现　出处：《电子科技大学》2015年硕士论文　论文类型：学位论文

  更多相关文章： 数字阵列雷达 雷达信号处理 雷达系统设计 脉冲压缩

【摘要】：数字阵列雷达是一种接收和发射波束都以数字方式实现的全数字相控阵雷达,它是数字雷达的重要类型。正如在电子系统中数字技术正在取代模拟技术一样,数字雷达正在取代模拟雷达。数字雷达对来自内部和外部的射频干扰以及对温度和湿度的反应不像模拟雷达那样敏感,而且价格也不像后者那样贵。此外,数字阵列雷达可通过改变程序来执行根本不同的工作模式,这是模拟雷达无法实现的。数字阵列雷达的主要构成部分有数字T/R组件、数字波束形成、大容量高速数据传输技术和高效率软件化信号处理机。接收数字波束形成是把阵列天线输出的信号进行A/D采样后送到数字波束形成器,然后对接收信号进行复加权处理,形成所需波束信号。此外,数字阵列雷达需要一个高性能的信号处理机来完成时序生成、任务控制、校对处理、波束控制、目标追踪以及显示处理等工作。所以,数字波束形成和数字信号处理机在数字阵列雷达中起着举足轻重的作用。本论文结合某数字阵列雷达项目的具体背景和要求,分析研究数字阵列雷达信号处理机的信号处理流程、具体实现方法和性能分析。提出了该数字阵列雷达项目的信号处理方案;同时对各个模块进行具体设计以及Matlab和Modelsim仿真分析;最后完成了基于FPGA的硬件实现,用以验证方案的可行性。本论文完成的主要内容包括:第一,数字阵列雷达信号处理基本理论方法的研究。主要包括数字波束形成、雷达信号形式、脉冲压缩(PC)、动目标显示(MTI)和动目标检测(MTD)以及恒虚警检测(CFAR)。结合项目特点,本论文阐述了各个部分的理论知识和常用实现方法。第二,信号处理机系统设计和各模块设计、仿真和分析。结合项目特点,设定数字阵列雷达的具体参数,给出系统方案设计、仿真以及性能分析。第三,信号处理机基于FPGA的硬件实现。使用Altera公司的StratixⅢEP3SE80F1152I3为主要芯片,采用VHDL语言。对信号处理板的组成结构和重要芯片功能作了详细介绍,给出各模块的Signaltap分析仪取图以验证设计的正确性。
[Abstract]:Digital array radar (digital array radar) is an all digital phased array radar that receives and transmit beamforming in digital manner. It is an important type of digital radar. Just as digital technology is replacing analog technology in electronic systems, digital radar is replacing analog radar. Digital radar does not respond to radio frequency interference and temperature and humidity from inside and outside. It is not as sensitive as simulated radar, and the price is not as expensive as the latter. In addition, digital array radar can perform radically different working modes by changing the program, which is impossible for analog radar. The main components of digital array radar include digital T/R module, digital beamforming, high capacity and high speed data transmission technology and high efficiency software signal processor. Receiving digital beamforming is to transmit signals from array antenna to A/D and send it to digital beamformer. Then, the received signal is processed by complex weighting to form the desired beam signal. In addition, digital array radar needs a high-performance signal processor to complete timing generation, task control, collation, beam control, target tracking and display processing. Therefore, digital beamforming and digital signal processor play an important role in digital array radar. Based on the specific background and requirements of a digital array radar project, this paper analyzes and studies the signal processing flow, implementation method and performance analysis of digital array radar signal processor. The signal processing scheme of the digital array radar project is put forward. At the same time, the specific design of each module and the simulation analysis of Matlab and Modelsim are carried out. Finally, the hardware implementation based on FPGA is completed to verify the feasibility of the scheme. The main contents of this paper are as follows: first, the basic theory and method of digital array radar signal processing. It mainly includes digital beamforming, radar signal form, pulse compression (PC), moving target display (MTI) and moving target detection (MTD) and constant false alarm detection (CFAR). According to the characteristics of the project, this paper expounds the theoretical knowledge and the common realization methods of each part. Second, the design of the signal processor system and the design, simulation and analysis of each module. According to the characteristics of the project, the specific parameters of the digital array radar are set, and the design, simulation and performance analysis of the system are given. Third, the signal processor is based on the hardware implementation of FPGA. The Stratix III EP3SE80F1152I3 of Altera company is used as the main chip, and the VHDL language is used. The structure of the signal processing board and the function of the important chip are introduced in detail, and the Signaltap analyzer of each module is given to verify the correctness of the design.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN957.51
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本文编号：1343259