射频收发机实验平台的设计实现

发布时间：2018-01-06 08:03

本文关键词：射频收发机实验平台的设计实现　出处：《电子科技大学》2014年硕士论文　论文类型：学位论文

【摘要】：随着通信技术的飞速发展,对大学生的通信工程设计与硬件实现能力提出了更高的要求。由于目前适合学生实验用的实验平台相对缺乏,国内高校目前开设的相近类型实验一般都以比较简单的演示验证性实验居多,缺少系统性的设计实验。因此,构建一个完整的无线通信实验平台,对培养学生的创新、设计能力和工程素养,增强学生对无线通信领域知识的理解有重要的意义。本文完成了工作在2.4-2.48GHz频段多信道通信的无线通信实验平台的设计。该平台涉及到频率综合器、收发机射频前端、调制解调、数字处理以及控制电路等多个模块的设计,各模块形成一个完整的无线通信系统。本实验平台采用模块化思想,因此,收发机射频前端选择使用集成度低的超外差式结构且收发机射频前端的每个功能电路都采用单独的模块进行实现,方便学生进行设计性实验和自主设计。利用小数分频的PLL技术实现的频率综合器为收发机提供本振信号,既实现了步进的精细调整,降低了小步进频率源的实现难度,又兼顾了低噪声低杂散的性能指标,-95dBc/Hz@1KHz的低相位噪声对收发机整体灵敏度的提升有很大的意义。收发机射频前端使用上/下变频的方式来实现载波频率140MHz中频与2.4-2.48GHz射频的转化,降低了射频前端的实现难度。通过正交调制解调完成FPGA基带信号与射频前端中频信号的转化,可以很大程度上实现较高效率的信号传输,并且能够兼容其他不同的传输方式。通过对该系统的硬件功能和通信性能进行测试,并对测试结果进行分析。频率综合器能够实现-95dBc/Hz@1KHz的低相位噪声,接收机能够实现69dB的动态范围,接收机的灵敏度可以达到-105dBm。基带信号为视频信号的多信道通信时室内通信距离可以超过22m,该实验平台可以达到课题指标的要求。
[Abstract]:With the rapid development of communication technology, the communication engineering design and hardware implementation ability of college students have been put forward higher requirements, because the experimental platform suitable for students' experiments is relatively lacking at present. At present, the similar types of experiments in domestic colleges and universities are generally more simple demonstration verification experiments, lack of systematic design experiments. Therefore, build a complete wireless communication experimental platform. To cultivate students' innovation, design ability and engineering literacy. It is very important to enhance students' understanding of wireless communication field. In this paper, the design of wireless communication experiment platform in 2.4-2.48GHz multi-channel communication is completed. The platform involves frequency. Synthesizer. Transceiver RF front-end, modulation and demodulation, digital processing and control circuit and other modules design, each module to form a complete wireless communication system. The RF front-end of transceiver adopts a low-integration superheterodyne structure and each functional circuit of RF front-end of transceiver is implemented by a separate module. It is convenient for students to carry out design experiment and independent design. The frequency synthesizer realized by PLL technology of fractional frequency division provides local oscillator signal for transceiver, which realizes the fine adjustment of step. It reduces the difficulty of realizing the small step frequency source and takes into account the performance index of low noise and low spurious. The low phase noise of -95dBc / Hz@ 1kHz has great significance to the overall sensitivity of transceiver. The RF front-end of transceiver uses upconversion / down-conversion to realize the carrier frequency 140MHz. Conversion of frequency to 2.4-2.48GHz RF. Through quadrature modulation and demodulation to complete the conversion of FPGA baseband signal and RF front-end intermediate frequency signal, the high efficiency signal transmission can be realized to a great extent. And it can be compatible with other transmission modes. By testing the hardware function and communication performance of the system. The frequency synthesizer can realize the low phase noise of -95dBc / Hz @ 1kHz and the receiver can realize the dynamic range of 69dB. The sensitivity of the receiver can reach -105dBm.The indoor communication distance can exceed 22m when the baseband signal is multi-channel communication signal.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TN859

【参考文献】