航天小型摄像机的视频编码器设计

发布时间：2018-01-24 21:26

本文关键词： 视频编码器运动估计 FPGA 航天摄像机　出处：《西安电子科技大学》2014年硕士论文　论文类型：学位论文

【摘要】：随着技术的突飞猛进,在各行各业中如实时视频通信和视频流媒体方面,在航天探索宇宙的最前沿,视频压缩正发挥着不可替代的作用。并随着可编程逻辑器件的快速发展,视频压缩系统现在正朝着高速、高压缩率、高可靠性以及小型化的方向不断推进。由此以小型化为设计目标实现视频压缩正是当前研究的热点。基于小型化的航天设计理念,本文完成了对摄像机的视频编码系统设计和实现。设计的系统采用FPGA实现方案,并使用外部存储器SDRAM进行数据的缓存。系统具体采用了简单高效的算法,利用流水线处理过程完成,并在实现中加入了可靠性设计,保障其在航天环境中正常工作。论文的主要研究工作有:首先,本文围绕视频编码器的研究,简单介绍了视频压缩的研究背景,标准在专家研究发布下不断推进的历程,并总结了标准特别是应用最广的MPEG-4和H.264的特点,以及结合本文航天编码器基于FPGA设计,阐述FPGA在该领域中投入应用的历程。接着,本文介绍了视频压缩编码实现的基本原理,采用通用的混合方式,包括对时域,空间域及码字的压缩,并阐述了视频编解码器的基本框架和实现流程,这些标准采用的技术框架基本一致,具体阐述了MPEG-4和H.264不同的技术细节和实现方式,涉及的模式。其次,本文研究对比了当前流行的实现架构,阐述了各个方案的优缺点。并且针对航天应用以及小型化设计的目标,编码系统确定采用FPGA架构实现。在编码器关键实现技术的理论基础上,详细阐述了基于FPGA架构的编码器实现设计流程和具体实现模块,其中CMOS传感器控制模块,自动曝光功能,编码单元对图像信号进行处理并实现图像压缩,输出压缩码流。对比常见的搜索方式,重点阐述了图像压缩部分采用的具有针对性的运动估计搜索方法,并且匹配准则采用SAD。系统通过合理利用硬件资源,阐述实现采用的模块化设计思想和灵活并行流水线技术,提高视频编码系统的处理速度。最后,本系统的FPGA程序首先通过软件对各个模块和系统总体进行功能仿真,仿真正确后在硬件平台上验证,本文提出的系统满足小型化需求,并证明其具有较好的性能和处理速度。
[Abstract]:With the rapid development of technology, in a variety of industries such as real-time video communications and video streaming, space exploration in the space of the forefront of the universe. Video compression is playing an irreplaceable role. With the rapid development of programmable logic devices, video compression system is moving towards high speed and high compression ratio. The direction of high reliability and miniaturization is constantly advancing. Therefore, video compression based on miniaturization is the focus of current research. Based on the concept of miniaturization space design. In this paper, the design and implementation of video coding system for video camera is completed. The system is designed by FPGA. And the external memory SDRAM is used to cache the data. A simple and efficient algorithm is used in the system. Pipeline is used to process the data and the reliability design is added to the implementation. The main work of this thesis is as follows: firstly, this paper focuses on the research of video encoder, and introduces the research background of video compression. The standard is advancing continuously under the expert research release, and summarizes the characteristic of the standard, especially the most widely used MPEG-4 and H.264, and combines the design of the aerospace encoder based on FPGA in this paper. This paper describes the application of FPGA in this field. Then, this paper introduces the basic principle of video compression coding, using a general hybrid method, including the time domain, spatial domain and codeword compression. The basic framework and implementation flow of video codec are described. The technical framework used in these standards is basically the same. The different technical details and implementation methods of MPEG-4 and H.264 are described in detail. Secondly, this paper studies and compares the current popular implementation architecture, describes the advantages and disadvantages of each scheme, and aims at aerospace applications and miniaturization design objectives. The coding system is determined to be implemented by FPGA architecture. On the basis of the theory of key encoder implementation technology, the design flow and specific implementation module of encoder based on FPGA architecture are described in detail. CMOS sensor control module, automatic exposure function, coding unit to process the image signal and achieve image compression, output compression code stream. Compare common search methods. Focus on the image compression part of the targeted motion estimation search method, and the matching criteria using SAD. the system through the rational use of hardware resources. The modular design idea and the flexible parallel pipeline technology are introduced to improve the processing speed of the video coding system. Finally. At first, the FPGA program of the system simulates the function of each module and system through software, and the simulation is verified on the hardware platform. The system proposed in this paper meets the miniaturization requirement. It is proved that it has good performance and processing speed.
【学位授予单位】：西安电子科技大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TN919.81

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