LTE-A下行同步技术研究及FPGA实现

发布时间：2018-02-11 04:48

本文关键词： LTE-A OFDMA 小区搜索同步　出处：《电子科技大学》2014年硕士论文　论文类型：学位论文

【摘要】：作为主流的4G技术,在无线通信领域,LTE-A一直是热点研究对象。LTE-A以OFDMA为多址技术,而OFDM符号载波间的正交性对定时以及频率的偏差相当敏感,精确的时间和频率同步对LTE接收性能有着重要的意义。由于所处的环境复杂多变,加上终端的移动性,使得同步的情况也是实时变化。为了保持同步的正确性,实时的对同步进行跟踪,保持终端与基站的同步也是很有必要的。本文主要研究LTE-A下行同步技术,包括了初始的小区搜索以及后续的实时同步跟踪,针对下行同步各个过程的特点和要求,设计了合适的实现方案,在达到性能的前提下,尽量的减少资源的消耗,下面为本文的主要论述内容:1.首先介绍了LTE-A物理层的相关内容,包括LTE-A的帧格式,OFDM原理,以及同步中使用到的同步信号和小区参考信号。最后对无线信道的相关概念做了介绍。2.定量地分析了定时和频率的偏差的影响,根据定量分析定时偏差要求在同步跟踪以后在8个采样点以内,频率偏差的均方误差在0.01%以内。然后介绍了PSS信号与SSS信号的检测方法,最后对适用于LTE-A的主要的同步算法进行介绍和简单的分析,包括时间和载波同步。3.设计了小区搜索方案,其中PSS信号检测采用本地序列相关的算法,在SSS信号检测前加入了信道估计和均衡,同时对均衡后的SSS信号进行了符号量化,从而提高了检测性能,降低了资源的消耗。对LTE-A同步的各个算法进行了仿真分析,针对实时同步对精度要求高的特点,选择了基于信道估计的同步算法。同时结合算法本身与LTE系统的特点,对定时跟踪算法进行了改进,降低了资源的消耗。最后对设计的方案进行了Matlab仿真,对于初始同步,在2dB即可以达到90%的检测正确率,对于同步跟踪在-2dB左右即可以达到90%以上的定时同步正确率,同时频率偏差的均方误差小于0.01%。4.最后对设计的方案进行了定点仿真以及RTL级设计,通过Modelsim软件验证了电路功能的正确性,同时用软件工具进行了综合以及时序分析,电路的工作频率可以达到200MHz,初始同步最坏情况可以在6ms内完成,实时同步可以满足1ms的实时性要求。用Xilinx公司的Virtex 6开发板进行测试验证。测试结果表明了电路的正确性,并且性能可以达到预期要求。
[Abstract]:As the mainstream 4G technology, LTE-A has been a hot research object in wireless communication field. LTE-A takes OFDMA as the multiple access technology. The orthogonality between OFDM symbols is sensitive to timing and frequency deviation. Precise time and frequency synchronization is of great significance to the performance of LTE receiver. Because of the complexity of the environment and the mobility of the terminal, the synchronization is also a real-time change. It is also necessary to keep the synchronization between the terminal and the base station in real time. This paper mainly studies the LTE-A downlink synchronization technology, including the initial cell search and subsequent real-time synchronization tracking. According to the characteristics and requirements of each process of downlink synchronization, a suitable implementation scheme is designed to reduce the consumption of resources under the premise of achieving performance. The following is the main content of this paper: 1. Firstly, the related contents of LTE-A physical layer are introduced. It includes the frame format of LTE-A and the synchronization signal and cell reference signal used in synchronization. Finally, the related concepts of wireless channel are introduced. The influence of timing and frequency deviation is analyzed quantitatively. According to the requirement of quantitative analysis, the timing deviation is within 8 sampling points after synchronous tracking, and the mean square error of frequency deviation is less than 0.01%. Then, the detection method of PSS signal and SSS signal is introduced. Finally, the main synchronization algorithms suitable for LTE-A are introduced and analyzed, including time and carrier synchronization. 3. Cell search scheme is designed, in which local sequence correlation algorithm is used for PSS signal detection. The channel estimation and equalization are added before the detection of SSS signal, and the symbol quantization of the equalized SSS signal is carried out at the same time, which improves the detection performance and reduces the consumption of resources. The simulation analysis of each algorithm of LTE-A synchronization is carried out. Aiming at the high precision requirement of real-time synchronization, the synchronization algorithm based on channel estimation is selected, and the timing tracking algorithm is improved by combining the characteristics of the algorithm itself and the LTE system. Finally, the Matlab simulation of the designed scheme is carried out. For initial synchronization, the detection accuracy is 90% at 2dB, and the correct rate of timing synchronization is more than 90% for synchronization tracking at -2dB. At the same time, the mean square error of frequency deviation is less than 0.01. 4. At last, the fixed point simulation and RTL level design of the designed scheme are carried out. The correctness of the circuit function is verified by the Modelsim software. At the same time, the software tools are used to synthesize and analyze the timing of the circuit. The working frequency of the circuit can reach 200MHz, the worst case of initial synchronization can be completed in 6ms, and the real-time synchronization can meet the real-time requirement of 1ms. The test results are verified by the Virtex 6 development board of Xilinx Company. The test results show that the circuit is correct. And the performance can meet the expected requirements.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TN929.5

【共引文献】